From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fx.arvanta.net (93-87-244-166.static.isp.telekom.rs [93.87.244.166]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C31B83769E9; Fri, 10 Jul 2026 17:44:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=93.87.244.166 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783705485; cv=none; b=EVeaBfkrqzeO5VyC6lMXksF/H/keDOsQeHQ1FjstcvQOvwQDh3cVdDVtdbxPh+9ngWNsa+/0lJEo5HM2var6OQCQtOYwEor1z1h7bETX21lgqHAPEFVmrQVKxyEQkiVJaUiV6vhWsJwayy1owStV7oXbrl2mY3Q+5vZfC3fBK0c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783705485; c=relaxed/simple; bh=bfJbN/i3p8vhV4jRbWd4NRdb0ZEMHuwXU3j0imuckcs=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=FpZ0gx3bBB/HNSMU7U0lDRFYUui/oFCudx9L7idQg/2sZvYtFlqzUN1mK5cAQ02WZdNECFXbbeuFLonee8ij/7U5P7xvPSIVdOwDe0oAutH126niZkhkJMYbDwsLNqk1U92x01WWXN5cuEt8SpU7KiOg+AGEYg/i+qL9fm2yaw4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=arvanta.net; spf=pass smtp.mailfrom=arvanta.net; arc=none smtp.client-ip=93.87.244.166 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=arvanta.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arvanta.net Received: from air.arvanta.net (air.arvanta.net [10.5.1.4]) by fx.arvanta.net (Postfix) with ESMTP id ED996CF; Fri, 10 Jul 2026 19:25:06 +0200 (CEST) Date: Fri, 10 Jul 2026 19:25:06 +0200 From: Milan =?utf-8?Q?P=2E_Stani=C4=87?= To: Shuwei Wu Cc: "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yixun Lan , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, devicetree@vger.kernel.org Subject: Re: [PATCH v4 0/2] cpufreq: spacemit: Add cpufreq support for K1 SoC Message-ID: <20260710172506.GA7260@air.arvanta.net> References: <20260626-shadow-deps-v4-0-bba9831f2f1d@mailbox.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260626-shadow-deps-v4-0-bba9831f2f1d@mailbox.org> On Fri, 2026-06-26 at 16:10, Shuwei Wu wrote: > This series enables CPU DVFS for the SpacemiT K1 SoC using the generic > cpufreq-dt driver. > > K1 has two CPU clock clusters. The two clusters have separate CPU clocks, > so they are represented as two cpufreq policies: policy0 for CPUs 0-3 and > policy4 for CPUs 4-7. > > The CPU voltage rail is shared between the clusters. To model this with two > policies, the OPP entries describe voltage ranges instead of a single fixed > voltage, so the shared regulator can keep the rail within a range acceptable > for the active OPP constraints. > > Tested on Banana Pi BPI-F3: > > ~ # cat /sys/devices/system/cpu/online > 0-7 > > ~ # ls /sys/devices/system/cpu/cpufreq/ > policy0 policy4 > > ~ # cat /sys/devices/system/cpu/cpufreq/policy0/scaling_driver > cpufreq-dt > ~ # cat /sys/devices/system/cpu/cpufreq/policy0/affected_cpus > 0 1 2 3 > > ~ # cat /sys/devices/system/cpu/cpufreq/policy4/scaling_driver > cpufreq-dt > ~ # cat /sys/devices/system/cpu/cpufreq/policy4/affected_cpus > 4 5 6 7 > > Both policies expose the same OPP frequencies: > > ~ # cat /sys/devices/system/cpu/cpufreq/policy0/scaling_available_frequencies > 614400 819000 1000000 1228800 1600000 > > ~ # cat /sys/devices/system/cpu/cpufreq/policy4/scaling_available_frequencies > 614400 819000 1000000 1228800 1600000 > > For each policy, scaling_setspeed was set to each supported OPP and the > workload was pinned to one CPU covered by that policy with taskset. > CPU0 was used for policy0, and CPU4 was used for policy4. The clock rates below > are from /sys/kernel/debug/clk/clk_summary. > > policy0 / CPU0: > ---------------------------------------------------------- > Frequency | cpu_c0_core_clk | Real (s) | User (s) > (kHz) | (Hz) | | > -------------+-------------------+------------+----------- > 1,600,000 | 1,600,000,000 | 1.81 | 1.80 > 1,228,800 | 1,228,800,000 | 2.37 | 2.37 > 1,000,000 | 1,000,000,000 | 2.89 | 2.89 > 819,000 | 819,200,000 | 3.56 | 3.55 > 614,400 | 614,400,000 | 4.71 | 4.71 > ---------------------------------------------------------- > > policy4 / CPU4: > ---------------------------------------------------------- > Frequency | cpu_c1_core_clk | Real (s) | User (s) > (kHz) | (Hz) | | > -------------+-------------------+------------+----------- > 1,600,000 | 1,600,000,000 | 1.81 | 1.80 > 1,228,800 | 1,228,800,000 | 2.36 | 2.36 > 1,000,000 | 1,000,000,000 | 2.89 | 2.89 > 819,000 | 819,200,000 | 3.55 | 3.55 > 614,400 | 614,400,000 | 4.71 | 4.70 > ---------------------------------------------------------- > > Signed-off-by: Shuwei Wu > --- > Changes in v4: > - Represent K1 as two cpufreq-dt policies, one per CPU clock cluster > - Use OPP voltage ranges for the shared CPU supply > - Link to v3: https://lore.kernel.org/r/20260612-shadow-deps-v3-0-2f3ba88611ff@mailbox.org > > Changes in v3: > - Add a K1-specific cpufreq driver for the shared-rail, dual-clock topology > - Use one shared CPU OPP table and one cpufreq policy for all CPUs > - Link to v2: https://lore.kernel.org/r/20260410-shadow-deps-v2-0-4e16b8c0f60e@mailbox.org > > Changes in v2: > - Move OPP tables to dedicated k1-opp.dtsi > - Enable OPP only on BPI-F3 with cpu-supply present > - Link to v1: https://lore.kernel.org/r/20260308-shadow-deps-v1-0-0ceb5c7c07eb@mailbox.org > Tested on bananapi-F3 and Musebook, works fine. Tested-by: Milan P. Stanić > ---