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From: sashiko-bot@kernel.org
To: "Junhui Liu" <junhui.liu@pigmoral.tech>
Cc: robh@kernel.org, linux-sunxi@lists.linux.dev,
	devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 1/8] dt-bindings: clk: sun60i-a733-ccu: Add allwinner A733 support
Date: Sun, 12 Jul 2026 08:13:40 +0000	[thread overview]
Message-ID: <20260712081341.038921F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260711-a733-clk-v2-1-974d188cbe0c@pigmoral.tech>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The conditionals for 'allwinner,sun60i-a733-ccu' and 'allwinner,sun60i-a733-r-ccu' fail to constrain the array lengths of 'clocks' and 'clock-names', leading to incomplete schema validation.
--

--- Patch [1]: [PATCH v2 1/8] dt-bindings: clk: sun60i-a733-ccu: Add allwinner A733 support ---
commit 8cfed61380df8be01d658a1c9e237ca6deace817
Author: Junhui Liu <junhui.liu@pigmoral.tech>

dt-bindings: clk: sun60i-a733-ccu: Add allwinner A733 support

This commit introduces the device tree bindings for the Allwinner A733 Clock
Control Unit (CCU) and R-CCU. It transitions the root clocking strategy to the
"hosc" clock and expands the clock tree outputs.

> diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun60i-a733-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun60i-a733-ccu.yaml
> new file mode 100644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/allwinner,sun60i-a733-ccu.yaml

[ ... ]

> +  clocks:
> +    minItems: 4
> +    maxItems: 7
> +
> +  clock-names:
> +    minItems: 4
> +    maxItems: 7
> +
> +required:
> +  - "#clock-cells"
> +  - "#reset-cells"
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          enum:
> +            - allwinner,sun60i-a733-ccu
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: High Frequency Oscillator (19.2MHz, 24MHz, or 26MHz)
> +            - description: Low Frequency Oscillator (usually at 32kHz)
> +            - description: Internal Oscillator
> +            - description: Low Frequency Oscillator fanout
> +
> +        clock-names:
> +          items:
> +            - const: hosc
> +            - const: losc
> +            - const: iosc
> +            - const: losc-fanout

[Severity: Medium]
Since the top-level schema defines maxItems: 7 for clocks and clock-names,
does this conditional block need to explicitly define maxItems: 4 for both
properties to prevent up to 3 extra clocks from being silently accepted during
schema validation?

> +
> +  - if:
> +      properties:
> +        compatible:
> +          enum:
> +            - allwinner,sun60i-a733-r-ccu
> +
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: High Frequency Oscillator (19.2MHz, 24MHz, or 26MHz)
> +            - description: Low Frequency Oscillator (usually at 32kHz)
> +            - description: Internal Oscillator
> +            - description: System 24MHz Clock
> +            - description: Peripherals PLL 0 (200 MHz output)
> +            - description: Peripherals PLL 0 (300 MHz output)
> +            - description: Peripherals PLL 1 (300 MHz output)
> +
> +        clock-names:
> +          items:
> +            - const: hosc
> +            - const: losc
> +            - const: iosc
> +            - const: sys-24m
> +            - const: pll-periph0-200m
> +            - const: pll-periph0-300m
> +            - const: pll-periph1-300m

[Severity: Medium]
Similarly, does this conditional block need to explicitly define minItems: 7
for both clocks and clock-names so that incomplete nodes with as few as 4
clocks are rejected by schema validation?

> +
> +additionalProperties: false

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260711-a733-clk-v2-0-974d188cbe0c@pigmoral.tech?part=1

  reply	other threads:[~2026-07-12  8:13 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-11  8:10 [PATCH v2 0/8] clk: sunxi-ng: Add support for Allwinner A733 CCU and PRCM Junhui Liu
2026-07-11  8:10 ` [PATCH v2 1/8] dt-bindings: clk: sun60i-a733-ccu: Add allwinner A733 support Junhui Liu
2026-07-12  8:13   ` sashiko-bot [this message]
2026-07-12 14:35   ` Krzysztof Kozlowski
2026-07-11  8:10 ` [PATCH v2 2/8] clk: sunxi-ng: sdm: Add dual patterns support Junhui Liu
2026-07-11  8:10 ` [PATCH v2 3/8] clk: sunxi-ng: a733: Add PRCM CCU Junhui Liu
2026-07-12  8:13   ` sashiko-bot
2026-07-11  8:10 ` [PATCH v2 4/8] clk: sunxi-ng: a733: Add PLL clocks support Junhui Liu
2026-07-12  8:13   ` sashiko-bot
2026-07-11  8:10 ` [PATCH v2 5/8] clk: sunxi-ng: a733: Add bus " Junhui Liu
2026-07-12  8:13   ` sashiko-bot
2026-07-11  8:10 ` [PATCH v2 6/8] clk: sunxi-ng: a733: Add mod " Junhui Liu
2026-07-12  8:13   ` sashiko-bot
2026-07-12 14:25   ` Junhui Liu
2026-07-11  8:10 ` [PATCH v2 7/8] clk: sunxi-ng: a733: Add bus clock gates Junhui Liu
2026-07-12  8:13   ` sashiko-bot
2026-07-12 14:29   ` Junhui Liu
2026-07-11  8:10 ` [PATCH v2 8/8] clk: sunxi-ng: a733: Add reset lines Junhui Liu
2026-07-12  8:13   ` sashiko-bot

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