Re: [PATCH 5/5] arm64: dts: qcom: ipq9574: enable the PCIe support on RDP454

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Mismatched and unsafe default bias for the active-low PERST# (reset) pin on PCIe0, causing premature reset de-assertion.
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--- Patch [5]: [PATCH 5/5] arm64: dts: qcom: ipq9574: enable the PCIe support on RDP454 ---
commit 52495aceaf771805ada229c324028601d793b505
Author: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>

arm64: dts: qcom: ipq9574: enable the PCIe support on RDP454

This commit enables the PCIe0 and PCIe2 instances on the IPQ9574 RDP454
board to connect QCN92xx Wi-Fi cards.

> diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts
> index f2334b9e0ed49..146422aede7db 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts
> +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts

[ ... ]

> +	pcie0_default: pcie0-default-state {
> +		clkreq-n-pins {
> +			pins = "gpio22";
> +			function = "pcie0_clk";
> +			drive-strength = <6>;
> +			bias-pull-up;
> +		};
> +
> +		perst-n-pins {
> +			pins = "gpio23";
> +			function = "gpio";
> +			drive-strength = <8>;
> +			bias-pull-up;
                        ^^^^^^^^^^^^

[Severity: Medium]
Will this prematurely de-assert the reset for the QCN92xx Wi-Fi endpoint?

Because reset-gpios is active-low, configuring the default state with
bias-pull-up pulls the PERST# pin high before the PCIe host driver probes.
This can violate PCIe timing requirements if power and clocks are still
stabilizing, potentially causing link training failures or device
unresponsiveness.

Is it intentional that pcie0_default uses bias-pull-up here, while
pcie2_default correctly uses bias-pull-down for its perst-n-pins?

> +		};
> +
> +		wake-n-pins {
> +			pins = "gpio24";
> +			function = "pcie0_wake";
> +			drive-strength = <6>;
> +			bias-pull-up;
> +		};
> +	};
> +
> +	pcie2_default: pcie2-default-state {

[ ... ]

> +		perst-n-pins {
> +			pins = "gpio29";
> +			function = "gpio";
> +			drive-strength = <8>;
> +			bias-pull-down;
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260714-pcie_move_to_new_binding-v1-0-6bb25887a0dc@oss.qualcomm.com?part=5