From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 071F944682F for ; Wed, 15 Jul 2026 12:23:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784118232; cv=none; b=ngqKVMAsrc3hbpU2ypZCQJ0dGme3UyLgoHGBe3JJeQx98vbzoGqFSYafbm61X1dAEUKHXlstVPGNydwvRkcxV8nGnuj2LL+fyJgPPHrz5E7zWuEHtNJ78dIGJ5kcgP3o7j1RwJ9dr2OqBmdvdhRRh+blyBcyHRkyYc+j79ctAHU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784118232; c=relaxed/simple; bh=bDAOPe5Qcuz1UX//tXS59VnDMR5cUxqww/YP5Nf/abY=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=mQz0Nqm2Sq35f/LrAU7EgrzzLEG5VjlNJF8a05qFuJlRklyIw6jIdmUdLVUeq5BDhNCR/SQfyfqcx+N6vdkb9x+pfNRiSgznewG3+gs2BGdybZe7XY1ioCVJHyK87YBHMgSr/Nuw0MIfbc2Ze+o0Yb5QMQ2GMqjX8fP/a2w7W58= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=TNGSDlND; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="TNGSDlND" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; s=k1; bh=8CvlUGuiNoEinh 8lQW/4EuXAkmHCwLSgBalcuIStamE=; b=TNGSDlNDYKgHCD6khSgdY6YCzV+rxC 45lVPXWq3pg1SHp79mPk6qSUh/6tyyKVnlaX0Ngg6aDUOp7keHEvnbZNB4l23DOB s5l1Vr6W7GofKutisNLF+8vj5oYh1EFC2vYy3Ub4J4LI9DDnC/sNhO7IQnL0WGfY mFE9hYX9qyvgjDFDGN5YIqrJlKo58dgT4BQwsOnYimo1O6lksmBSVjmXt4YKc+i7 YGJmkIpcxU2UZ6boDmtjJ8+bk5iVffxqI86O1nEsyVLegKKabGKMJ0+kYQxtgC/2 5aBlinKWmKDQDOWWSo41GMDii0Rxeemq1YEhRSqD9+MHRjrlryQVUiHw== Received: (qmail 682654 invoked from network); 15 Jul 2026 14:23:44 +0200 Received: by mail.zeus03.de with UTF8SMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 15 Jul 2026 14:23:44 +0200 X-UD-Smtp-Session: l3s3148p1@7Lv7ZKVW9JcujntW From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang , Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org Subject: [PATCH] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12 Date: Wed, 15 Jul 2026 14:21:05 +0200 Message-ID: <20260715122341.47838-2-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit CN12 offers some GPIOs independently of switch settings. Add the nodes. Verified all the pins with a multimeter successfully. Signed-off-by: Wolfram Sang --- .../boot/dts/renesas/r9a06g032-rzn1d400-eb.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts index ead379988fb1..7d6ddc91bb2e 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts @@ -57,6 +57,12 @@ &gpio2 { status = "okay"; }; +&gpio2b { + pinctrl-0 = <&pins_gpio2b>; + pinctrl-names = "default"; + status = "okay"; +}; + &i2c2 { /* Sensors are different across revisions. All are LM75B compatible */ sensor@49 { @@ -136,6 +142,17 @@ pins_eth2: pins-eth2 { bias-disable; }; + pins_gpio2b: pins-gpio2b { + pinmux = , + , + , + , + , + ; + drive-strength = <6>; + bias-disable; + }; + pins_mdio0: pins-mdio0 { pinmux = , ; -- 2.47.3