From: Krzysztof Kozlowski <krzk@kernel.org>
To: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Cc: Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Bryan O'Donoghue <bod@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
"Joerg Roedel (AMD)" <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stanimir Varbanov <stanimir.k.varbanov@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,
linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
devicetree@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: Re: [PATCH v9 01/14] dt-bindings: media: qcom,glymur-iris: Add glymur video codec
Date: Thu, 16 Jul 2026 09:40:00 +0200 [thread overview]
Message-ID: <20260716-soft-dexterous-adder-badb49@quoll> (raw)
In-Reply-To: <20260715-glymur-v9-1-8cf2cbe12a07@oss.qualcomm.com>
On Wed, Jul 15, 2026 at 07:39:55PM +0530, Vishnu Reddy wrote:
> Add device tree binding for the Qualcomm Glymur Iris video codec. Glymur
> is a new generation of video IP that introduces a dual-core architecture.
> The second core brings its own power domain, clocks, and reset lines,
> requiring additional power domains and clocks in the power sequence.
> The current maxItems constraints for clocks and power-domains in the
> common venus schema were sized for platforms available at the time of
> authoring. The glymur platform introduces a dual core architecture
> that requires more clocks and power domains, exceeding these limits.
> Raise maxItems for clocks, clock-names, power-domains and
> power-domain-names to accommodate the glymur platform.
> The glymur platform-specific schema have fixed constraints for these
> properties, so the common schema only acts as an upper bound.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
You must drop the tag, you changed the binding significantly without any
doubts.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-07-16 7:40 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 14:09 [PATCH v9 00/14] media: iris: Add support for glymur platform Vishnu Reddy
2026-07-15 14:09 ` [PATCH v9 01/14] dt-bindings: media: qcom,glymur-iris: Add glymur video codec Vishnu Reddy
2026-07-15 14:22 ` sashiko-bot
2026-07-16 3:07 ` Vishnu Reddy
2026-07-16 7:40 ` Krzysztof Kozlowski [this message]
2026-07-15 14:09 ` [PATCH v9 02/14] media: iris: Add hooks to initialize and tear down context banks Vishnu Reddy
2026-07-15 14:23 ` sashiko-bot
2026-07-15 14:09 ` [PATCH v9 03/14] media: iris: Add helper to create a context bank device Vishnu Reddy
2026-07-15 14:09 ` [PATCH v9 04/14] media: iris: Add helper to select relevant " Vishnu Reddy
2026-07-15 14:29 ` sashiko-bot
2026-07-16 3:15 ` Vishnu Reddy
2026-07-15 14:09 ` [PATCH v9 05/14] media: iris: Skip DMA mask setting to core device when IOMMU is not mapped Vishnu Reddy
2026-07-15 14:22 ` sashiko-bot
2026-07-15 14:10 ` [PATCH v9 06/14] media: iris: Enable Secure PAS support with IOMMU managed by Linux Vishnu Reddy
2026-07-15 14:37 ` sashiko-bot
2026-07-16 3:25 ` Vishnu Reddy
2026-07-15 14:10 ` [PATCH v9 07/14] media: iris: Replace enum-indexed clock and power domain tables with per-block structures Vishnu Reddy
2026-07-15 14:39 ` sashiko-bot
2026-07-15 14:10 ` [PATCH v9 08/14] media: iris: Add power sequence for glymur Vishnu Reddy
2026-07-15 14:36 ` sashiko-bot
2026-07-15 14:10 ` [PATCH v9 09/14] media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook Vishnu Reddy
2026-07-15 14:10 ` [PATCH v9 10/14] media: iris: Add support to select core for dual core platforms Vishnu Reddy
2026-07-15 14:42 ` sashiko-bot
2026-07-15 14:10 ` [PATCH v9 11/14] media: iris: Add hooks for pixel and non-pixel context banks Vishnu Reddy
2026-07-15 14:52 ` sashiko-bot
2026-07-15 15:27 ` Bryan O'Donoghue
2026-07-16 2:59 ` Vishnu Reddy
2026-07-15 14:10 ` [PATCH v9 12/14] media: iris: Add platform data for glymur Vishnu Reddy
2026-07-15 14:10 ` [PATCH v9 13/14] arm64: dts: qcom: glymur: Add iris video node Vishnu Reddy
2026-07-15 15:18 ` sashiko-bot
2026-07-15 14:10 ` [PATCH v9 14/14] arm64: dts: qcom: glymur-crd: Enable iris video codec node Vishnu Reddy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260716-soft-dexterous-adder-badb49@quoll \
--to=krzk@kernel.org \
--cc=abhinav.kumar@linux.dev \
--cc=andersson@kernel.org \
--cc=bod@kernel.org \
--cc=busanna.reddy@oss.qualcomm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dikshita.agarwal@oss.qualcomm.com \
--cc=dmitry.baryshkov@oss.qualcomm.com \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=krzysztof.kozlowski@oss.qualcomm.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=mchehab@kernel.org \
--cc=robh@kernel.org \
--cc=robin.murphy@arm.com \
--cc=stanimir.k.varbanov@gmail.com \
--cc=vikash.garodia@oss.qualcomm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox