From: sashiko-bot@kernel.org
To: "Akari Tsuyukusa" <akkun11.open@gmail.com>
Cc: mfd@lists.linux.dev, lee@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH 3/3] soc: mediatek: pwrap: add MT6589 PWARP and MT6320 PMIC support
Date: Thu, 16 Jul 2026 17:27:29 +0000 [thread overview]
Message-ID: <20260716172730.089081F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260716171733.300885-4-akkun11.open@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incorrect capability flag used for MT6320 PMIC: `PWRAP_DEW_DIO_EN` is used instead of `PWRAP_SLV_CAP_DUALIO`, silently disabling Dual I/O mode.
--
--- Patch [3]: [PATCH 3/3] soc: mediatek: pwrap: add MT6589 PWARP and MT6320 PMIC support ---
commit 69d3d2c2fbeaf34ea620f48758fb711a4ca760f9
Author: Akari Tsuyukusa <akkun11.open@gmail.com>
soc: mediatek: pwrap: add MT6589 PWARP and MT6320 PMIC support
This commit adds support for the MediaTek MT6589 PWRAP and MT6320 PMIC.
It also refactors the existing MT8135 bridge register definitions to use
a generic prefix.
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 0bcd858263755..3a5b007d60f58 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
[ ... ]
> @@ -2186,6 +2341,14 @@ static const struct pwrap_slv_regops pwrap_regops32 = {
> .regmap = &pwrap_regmap_config32,
> };
>
> +static const struct pwrap_slv_type pmic_mt6320 = {
> + .dew_regs = mt6320_regs,
> + .type = PMIC_MT6320,
> + .regops = &pwrap_regops16,
> + .caps = PWRAP_SLV_CAP_SPI | PWRAP_DEW_DIO_EN |
[Severity: Medium]
Does using PWRAP_DEW_DIO_EN here instead of PWRAP_SLV_CAP_DUALIO accidentally
disable Dual I/O mode?
PWRAP_DEW_DIO_EN is an enumeration value for a register index that evaluates
to 1 (since PWRAP_DEW_BASE is 0). PWRAP_SLV_CAP_SPI is BIT(0), which also
equals 1. Bitwise ORing them together results in a bitmask that completely
omits the intended Dual I/O capability, as PWRAP_SLV_CAP_DUALIO is BIT(1).
This causes HAS_CAP(wrp->slave->caps, PWRAP_SLV_CAP_DUALIO) to evaluate to
false during pwrap_init(), skipping pwrap_init_dual_io() and leaving the
PMIC wrapper in single I/O SPI mode.
> + PWRAP_SLV_CAP_SECURITY,
> +};
> +
> static const struct pwrap_slv_type pmic_mt6323 = {
> .dew_regs = mt6323_regs,
> .type = PMIC_MT6323,
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260716171733.300885-1-akkun11.open@gmail.com?part=3
prev parent reply other threads:[~2026-07-16 17:27 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-16 17:17 [PATCH 0/3] soc: mediatek: pwrap: MT6589 + MT6320 support Akari Tsuyukusa
2026-07-16 17:17 ` [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: Add compatible for MT6589 SoC Akari Tsuyukusa
2026-07-16 17:30 ` sashiko-bot
2026-07-16 17:17 ` [PATCH 2/3] dt-bindings: mfd: mediatek: mt6397: add MT6320 compatible string Akari Tsuyukusa
2026-07-16 17:24 ` sashiko-bot
2026-07-16 17:17 ` [PATCH 3/3] soc: mediatek: pwrap: add MT6589 PWARP and MT6320 PMIC support Akari Tsuyukusa
2026-07-16 17:27 ` sashiko-bot [this message]
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