From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from hall.aurel32.net (hall.aurel32.net [195.154.119.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 693003C4B63; Thu, 16 Jul 2026 21:33:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.154.119.183 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784237610; cv=none; b=XFLa5DElmun8E3Tzhrwhgj9TnEy4Dj8pGsaPBXwhGe7GC8syqy153TaJiyJqdqnPH1X7q4dblRqBDHd26frzupOlo8XkGE5y3MdUVbyeQ8CqwWrfWQUCxx0R8B/TGspw7iN6dAIiSLvOqF6/LMq9Sc9lc+O9252lUG/oP4o0wXw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784237610; c=relaxed/simple; bh=H1U+73F8vYuJ4IkkOb7GdsSQE/TObiLX57wmlFts25E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oMBV7GvFGAEC7tnEq+iU/ZoiK8/lw7pa9i4PP2X8OpqwefS62u0Z4czExyYb6DnCYWsp4zzLbhB56QMrT9KubDpgKxwaTYGSUAYSadS+qI1tCelfx7NVki0ZJRfYCvbLP4nm/pB+ex+b64NQUEm6drPpYScFsoNP7HWt8GfhqgY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=aurel32.net; spf=pass smtp.mailfrom=aurel32.net; dkim=pass (2048-bit key) header.d=aurel32.net header.i=@aurel32.net header.b=lIAPXGHu; arc=none smtp.client-ip=195.154.119.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=aurel32.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aurel32.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=aurel32.net header.i=@aurel32.net header.b="lIAPXGHu" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=aurel32.net ; s=202004.hall; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Content-Type:From:Reply-To: Subject:Content-ID:Content-Description:X-Debbugs-Cc; bh=MFR1Hi6i7aIKGEkXYS12ogWQN52DsFNDyd9nQVlY3ug=; b=lIAPXGHu1UWFC4BqQrawNnCUKA e80fwyDrqESRH9Vl59xIw0c+jGY4QNxbSDYPfP17VnYb1borax0BwTBiFg4SIhDYA04cmAJFxb83n mGzcPO37U2Po3qVeAl9+Ie/vZWzl/oKKx933nTkrRybC/bDXmmOfrQaGVsdIJJdRxNA/380BpdMdC K605UUOfOxvj632h7O79YAvzFtVFcl3PHfLFjUV0Wr2bAbb4y9N7Yie8DsGSvIBKHB7udwu538P8I BVMUqG5uyX9vZH7WzSkEm7C9ZPlwdBUkfCCNOkUuu3GVi1odRJ1iGIDFHJ4QdDzC2luu09EJD7ZWd bPFgWzaw==; Received: from authenticated user by hall.aurel32.net with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wkThu-00000003GZ5-0Nb4; Thu, 16 Jul 2026 23:33:26 +0200 From: Aurelien Jarno To: linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: Anirudh Srinivasan , Aurelien Jarno , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-riscv@lists.infradead.org (open list:RISC-V ARCHITECTURE), spacemit@lists.linux.dev (open list:RISC-V SPACEMIT SoC Support) Subject: [PATCH 3/4] riscv: dts: spacemit: k3: add USB3 B and C controllers for Pico-ITX board Date: Thu, 16 Jul 2026 23:19:03 +0200 Message-ID: <20260716213314.3027969-4-aurelien@aurel32.net> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260716213314.3027969-1-aurelien@aurel32.net> References: <20260716213314.3027969-1-aurelien@aurel32.net> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The SpacemiT K3 has 4 USB3 controllers labelled A to D. On the K3 Pico-ITX board, the controllers B and C are used in USB 2 mode only respectively for the M.2 B-Key slot and for the RTL8852BE Bluetooth controller. Add the two controller nodes and the two corresponding USB2 PHY nodes (the PCIe/USB3 combo PHY driver is not yet merged) and enable them on the K3 Pico-ITX board. Signed-off-by: Aurelien Jarno --- arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 18 ++++++ arch/riscv/boot/dts/spacemit/k3.dtsi | 65 ++++++++++++++++++++ 2 files changed, 83 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts index 4aa7d56fb7568..011a35e6372e1 100644 --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts @@ -325,3 +325,21 @@ hub@1 { &usb2_phy { status = "okay"; }; + +&usb3b { + maximum-speed = "high-speed"; + status = "okay"; +}; + +&usb3b_u2phy { + status = "okay"; +}; + +&usb3c { + maximum-speed = "high-speed"; + status = "okay"; +}; + +&usb3c_u2phy { + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi index fc46e34465e47..b14bd8a164537 100644 --- a/arch/riscv/boot/dts/spacemit/k3.dtsi +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include /dts-v1/; @@ -438,6 +439,70 @@ soc: soc { dma-noncoherent; ranges; + usb3b: usb@81400000 { + compatible = "spacemit,k3-dwc3"; + reg = <0x0 0x81400000 0x0 0x10000>; + interrupts = <125 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&saplic>; + clocks = <&syscon_apmu CLK_APMU_USB3_PORTB_BUS>; + clock-names = "usbdrd30"; + resets = <&syscon_apmu RESET_APMU_USB3_B_AHB>, + <&syscon_apmu RESET_APMU_USB3_B_VCC>, + <&syscon_apmu RESET_APMU_USB3_B_PHY>; + reset-names = "ahb", "vcc", "phy"; + phys = <&usb3b_u2phy>; + phy-names = "usb2-phy"; + phy_type = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-ss-quirk; + dr_mode = "host"; + status = "disabled"; + }; + + usb3b_u2phy: phy@81500000 { + compatible = "spacemit,k3-usb2-phy"; + reg = <0x0 0x81500000 0x0 0x200>; + clocks = <&syscon_apmu CLK_APMU_USB3_PORTB_BUS>; + #phy-cells = <0>; + status = "disabled"; + }; + + usb3c: usb@81700000 { + compatible = "spacemit,k3-dwc3"; + reg = <0x0 0x81700000 0x0 0x10000>; + interrupts = <148 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&saplic>; + clocks = <&syscon_apmu CLK_APMU_USB3_PORTC_BUS>; + clock-names = "usbdrd30"; + resets = <&syscon_apmu RESET_APMU_USB3_C_AHB>, + <&syscon_apmu RESET_APMU_USB3_C_VCC>, + <&syscon_apmu RESET_APMU_USB3_C_PHY>; + reset-names = "ahb", "vcc", "phy"; + phys = <&usb3c_u2phy>; + phy-names = "usb2-phy"; + phy_type = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-ss-quirk; + dr_mode = "host"; + status = "disabled"; + }; + + usb3c_u2phy: phy@81800000 { + compatible = "spacemit,k3-usb2-phy"; + reg = <0x0 0x81800000 0x0 0x200>; + clocks = <&syscon_apmu CLK_APMU_USB3_PORTC_BUS>; + #phy-cells = <0>; + status = "disabled"; + }; + usb2_host: usb@c0a00000 { compatible = "spacemit,k3-dwc3"; reg = <0x0 0xc0a00000 0x0 0x10000>; -- 2.53.0