Re: [PATCH v6 2/3] arm64: dts: freescale: Add support for Variscite VAR-SOM-MX8 QuadMax

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing Cortex-A72 cores from the PMIC thermal cooling map.
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--- Patch [2]: [PATCH v6 2/3] arm64: dts: freescale: Add support for Variscite VAR-SOM-MX8 QuadMax ---
commit 7c5c452bc5aa9e24a57d1f6d97a7c92202c04f7f
Author: Stefano Radaelli <stefano.r@variscite.com>

arm64: dts: freescale: Add support for Variscite VAR-SOM-MX8 QuadMax

This commit adds device tree support for the Variscite VAR-SOM-MX8 QuadMax
system on module. It defines basic hardware allocations including memory,
regulators, audio, and Ethernet, leaving carrier-specific interfaces disabled.

Link: https://variscite.com/system-on-module-som/i-mx-8/i-mx-8-quadmax-quadplus/var-som-mx8/

> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-var-som.dtsi
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-var-som.dtsi

[ ... ]

> +&thermal_zones {
> +	pmic-thermal {
> +		polling-delay-passive = <250>;
> +		polling-delay = <2000>;
> +		thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
> +		trips {
> +			pmic_alert0: trip0 {
> +				temperature = <110000>;
> +				hysteresis = <2000>;
> +				type = "passive";
> +			};
> +			pmic_crit0: trip1 {
> +				temperature = <125000>;
> +				hysteresis = <2000>;
> +				type = "critical";
> +			};
> +		};
> +		cooling-maps {
> +			map0 {
> +				trip = <&pmic_alert0>;
> +				cooling-device = <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						 <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						 <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						 <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

[Severity: High]
Are the Cortex-A72 cores intentionally omitted from this cooling map?

The i.MX8 QuadMax contains both Cortex-A53 and higher-power Cortex-A72 cores.
If the PMIC temperature reaches the 110°C alert threshold, this passive cooling
map will throttle the A53 cores but leave the A72 cores unaffected.

Could an unprivileged workload heavily stressing the A72 cores cause the PMIC
to continue heating up until it hits the 125°C critical trip point, resulting
in a hard thermal shutdown? Should &A72_0 and &A72_1 be added to the
cooling-device list?

> +			};
> +		};
> +	};
> +};

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/cover.1784284092.git.stefano.r@variscite.com?part=2