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Used to locate the pattern data during PHY tuning when the device cannot load the pattern dynamically. PHY tuning works by reading a known data pattern from the device repeatedly while sweeping controller delay parameters until the capture window is stable. For SPI NAND, the driver loads the pattern into the page cache once using write-to-cache opcodes, then reads it during the sweep. SPI NOR devices have no equivalent opcode, so the pattern must be pre-programmed in a dedicated flash partition. One partition per device is required to keep the procedure unambiguous when multiple devices share a bus. Signed-off-by: Santhosh Kumar K --- .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 17 +++++++++++++++++ .../bindings/spi/spi-peripheral-props.yaml | 7 +++++++ 2 files changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index 891f578b5ac4..277dedcd4246 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -209,5 +209,22 @@ examples: cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; + spi-phy-pattern-partition = <&phy_pattern>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "data"; + reg = <0x0 0x3fc0000>; + }; + + phy_pattern: partition@3fc0000 { + label = "phy-pattern"; + reg = <0x3fc0000 0x40000>; + }; + }; }; }; diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 12211f8c9f7d..d506807c128a 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -122,6 +122,13 @@ properties: description: Delay, in microseconds, after a write transfer. + spi-phy-pattern-partition: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the flash partition holding the pre-programmed SPI PHY tuning + pattern. Used when the device cannot load the pattern dynamically during + PHY tuning. + stacked-memories: description: Several SPI memories can be wired in stacked mode. This basically means that either a device features several chip -- 2.34.1