From: sashiko-bot@kernel.org
To: "Imran Shaik" <imran.shaik@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v6 02/16] clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe
Date: Sat, 18 Jul 2026 13:23:30 +0000 [thread overview]
Message-ID: <20260718132330.EE1EE1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260718-shikra-dispcc-gpucc-v6-2-62703e05ef0f@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Placing a voting register in the clk_cbcrs array misuses the CBCR API and introduces a fragile pattern.
--
--- Patch [2]: [PATCH v6 02/16] clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe ---
commit d7a7b99958c3ce75a0a25d8faec4383b5f406ac6
Author: Imran Shaik <imran.shaik@oss.qualcomm.com>
clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe
This commit drops the modeling of certain always-on QCM2290 GCC branch clocks
and instead uses the .clk_cbcr convention to keep them enabled from probe.
> diff --git a/drivers/clk/qcom/gcc-qcm2290.c b/drivers/clk/qcom/gcc-qcm2290.c
> --- a/drivers/clk/qcom/gcc-qcm2290.c
> +++ b/drivers/clk/qcom/gcc-qcm2290.c
[ ... ]
> @@ -2943,6 +2845,15 @@ static struct gdsc *gcc_qcm2290_gdscs[] = {
> [HLOS1_VOTE_MM_SNOC_MMU_TBU_NRT_GDSC] = &hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc,
> };
>
> +static const u32 gcc_qcm2290_critical_cbcrs[] = {
> + 0x17008, /* GCC_CAMERA_AHB_CLK */
> + 0x17028, /* GCC_CAMERA_XO_CLK */
> + 0x1700c, /* GCC_DISP_AHB_CLK */
> + 0x1702c, /* GCC_DISP_XO_CLK */
> + 0x36004, /* GCC_GPU_CFG_AHB_CLK */
> + 0x79004, /* GCC_SYS_NOC_CPUSS_AHB_CLK */
[Severity: Low]
Does this code misuse the clk_cbcrs array? Register 0x79004 is a shared
voting register rather than a standard Clock Branch Control Register (CBCR).
Looking at how the API handles clk_cbcrs, the helper
qcom_branch_set_clk_en() unconditionally updates BIT(0) (the standard
CBCR enable bit).
While this functions correctly for GCC_SYS_NOC_CPUSS_AHB_CLK simply because
its voting mask happens to be exactly BIT(0), doesn't this introduce a
fragile pattern?
If this is copied for other voting clocks with different masks (such as
BIT(15)), won't it silently corrupt the voting register state and fail to
enable the intended clock?
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260718-shikra-dispcc-gpucc-v6-0-62703e05ef0f@oss.qualcomm.com?part=2
next prev parent reply other threads:[~2026-07-18 13:23 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-18 12:56 [PATCH v6 00/16] clk: qcom: Add DISPCC and GPUCC support for the Qualcomm Shikra SoC Imran Shaik
2026-07-18 12:56 ` [PATCH v6 01/16] dt-bindings: clock: qcom,qcm2290-dispcc: Add missing power-domains property Imran Shaik
2026-07-18 12:56 ` [PATCH v6 02/16] clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe Imran Shaik
2026-07-18 13:23 ` sashiko-bot [this message]
2026-07-18 12:56 ` [PATCH v6 03/16] clk: qcom: dispcc-qcm2290: Move to the latest common qcom_cc_probe() model Imran Shaik
2026-07-18 12:56 ` [PATCH v6 04/16] clk: qcom: dispcc-qcm2290: Enable runtime PM support Imran Shaik
2026-07-18 12:56 ` [PATCH v6 05/16] clk: qcom: qcm2290: Set POLL_CFG_GDSCR flag for DISPCC and GPUCC GDSCs Imran Shaik
2026-07-18 12:56 ` [PATCH v6 06/16] clk: qcom: qcm2290: Add RETAIN_FF_ENABLE " Imran Shaik
2026-07-18 13:12 ` sashiko-bot
2026-07-18 12:56 ` [PATCH v6 07/16] clk: qcom: qcm2290: Update DISPCC and GPUCC GDSC *wait_val values Imran Shaik
2026-07-18 12:56 ` [PATCH v6 08/16] clk: qcom: gpucc-qcm2290: Drop pm_clk handling Imran Shaik
2026-07-18 13:10 ` sashiko-bot
2026-07-18 12:56 ` [PATCH v6 09/16] clk: qcom: gpucc-qcm2290: Move to the latest common qcom_cc_probe() model Imran Shaik
2026-07-18 12:56 ` [PATCH v6 10/16] clk: qcom: gpucc-qcm2290: Keep the critical clocks always-on from probe Imran Shaik
2026-07-18 12:56 ` [PATCH v6 11/16] clk: qcom: gpucc-qcm2290: Park RCG's clk source at XO during disable Imran Shaik
2026-07-18 12:56 ` [PATCH v6 12/16] arm64: dts: qcom: agatti: Add missing CX power domain to DISPCC Imran Shaik
2026-07-18 12:56 ` [PATCH v6 13/16] dt-bindings: clock: qcom: Add Qualcomm Shikra Display clock controller Imran Shaik
2026-07-18 12:56 ` [PATCH v6 14/16] dt-bindings: clock: qcom: Add Qualcomm Shikra GPU " Imran Shaik
2026-07-18 12:56 ` [PATCH v6 15/16] clk: qcom: Add support for Qualcomm GPU Clock Controller on Shikra Imran Shaik
2026-07-18 12:56 ` [PATCH v6 16/16] arm64: dts: qcom: shikra: Add support for DISPCC/GPUCC nodes Imran Shaik
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