Re: [PATCH v3 2/3] arm64: dts: qcom: eliza-evk: Add PCIe0 with M.2 E key connector

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incorrect GPIO polarity for the M.2 W_DISABLE2# pin (`w-disable2-gpios` configured as `GPIO_ACTIVE_HIGH`).
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--- Patch [2]: [PATCH v3 2/3] arm64: dts: qcom: eliza-evk: Add PCIe0 with M.2 E key connector ---
commit 43876fd73356779d2e58bee01e3cfd92db672b22
Author: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

arm64: dts: qcom: eliza-evk: Add PCIe0 with M.2 E key connector

This commit enables the PCIe0 root port and its QMP PHY for the Eliza EVK
board. It also adds an M.2 E key connector node to support a WLAN and
Bluetooth card, wiring up the necessary regulator and W_DISABLE GPIOs.

> diff --git a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> index e47b24f8b8277..6d76715ccffbe 100644
> --- a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> +++ b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
[ ... ]
> +	connector-0 {
> +		compatible = "pcie-m2-e-connector";
> +		vpcie3v3-supply = <&vreg_pcie_m_3p3>;
> +		w-disable1-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
> +		w-disable2-gpios = <&pm8550vs_g_gpios 4 GPIO_ACTIVE_HIGH>;

[Severity: Medium]
According to the PCI Express M.2 Specification, W_DISABLE2# is an electrically
active-low signal, similar to W_DISABLE1#.

With w-disable2-gpios set to GPIO_ACTIVE_HIGH, asserting the GPIO will
physically drive it high, which enables the radio when it should be disabled.
Does this inverted polarity break the power sequencing logic for the Bluetooth
radio managed by the pwrseq-pcie-m2 driver? Should this be configured as
GPIO_ACTIVE_LOW?

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/20260721-eliza_evk-v3-0-92b10038f13d@oss.qualcomm.com?part=2