From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 70736403E97; Wed, 22 Jul 2026 22:03:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784757804; cv=none; b=I2sajk6ecnEnLYxxP47CfPNcROG6+CaXBjZVkYN3Z4sB+OoBPq+U8hwHWqxxHqP2BGaLwhQykAkUS832W8a2p+w2V8ciuGUYiaemRWW8542KvHB4NjCKeCn5y0E+9wHFg8aD2EL4QGC8jDjmXwGUi2WsOax0pFrxWcdYdA1TCf0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784757804; c=relaxed/simple; bh=TvkH+0aIc0tTfnfI29eAMPyUgUnwWVPMiXTscEFc5cA=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HwRgGG0eeLtHOjRfELmn8eMXirY+5VPCK13wQKKxf76ck4QNdo6VUsQpGw9nSjZ2lJGGvcjsyXvD1WEcKykwrYy56RBA6uOGR8nibKcz/z8fd8R5tN6jb7eIUVI/r6HuiGhMizGWzgYZXJIIg+eqaNhQGgsNnmrdVavh749VftM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=XTm0JRa0; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="XTm0JRa0" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F13071595; Wed, 22 Jul 2026 15:03:15 -0700 (PDT) Received: from ryzen.lan (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6FCEB3F59E; Wed, 22 Jul 2026 15:03:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1784757800; bh=TvkH+0aIc0tTfnfI29eAMPyUgUnwWVPMiXTscEFc5cA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=XTm0JRa070xzyTfMFsuNcX9jqqculPqlDQMejuKiQb4wP6pN/nZdOfTCx6Ws+uT6t syAD0yNAB2azqVHCLaPdPuJdt5iTrpJ2cpGoJJx7XU4ELMmtW6eLPsb+9uLR0/SaF7 xY9F/mth18z3GtXMLVA5pbojc4fOTc6Aynn0pCb8= Date: Wed, 22 Jul 2026 23:59:25 +0200 From: Andre Przywara To: Justin Suess Cc: Sean Young , Mauro Carvalho Chehab , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Sashiko Subject: Re: [PATCH v2 3/3] arm64: dts: allwinner: a523: enable IR receiver on the X96Q Pro+ Message-ID: <20260722235925.42c3466b@ryzen.lan> In-Reply-To: <20260722201717.2205609-4-utilityemal77@gmail.com> References: <20260722201717.2205609-1-utilityemal77@gmail.com> <20260722201717.2205609-4-utilityemal77@gmail.com> Organization: Arm Ltd. X-Mailer: Claws Mail 4.4.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 22 Jul 2026 16:17:17 -0400 Justin Suess wrote: Hi, > The X96Q Pro+ TV box has an IR receiver window on the front panel, > wired to the SoC CIR input on PL11. > > Enable the CIR receiver in the RTC power domain and mux its RX > signal to PL11. > > Tested on an X96 Pro+ with ir-keytable and nec keybindings with > the remote that it came with in the box. > > Signed-off-by: Justin Suess Confirmed with evtest and some random TV remote. Reviewed-by: Andre Przywara Tested-by: Andre Przywara Cheers, Andre > --- > arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts > index a96927fbdadd..1eaee20acaab 100644 > --- a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts > +++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts > @@ -266,6 +266,12 @@ reg_dcdc3_323: dcdc3 { > }; > }; > > +&r_ir { > + pinctrl-names = "default"; > + pinctrl-0 = <&r_ir_rx_pin>; > + status = "okay"; > +}; > + > &r_pio { > /* > * Specifying the supply would create a circular dependency.