Re: [PATCH v3 2/2] arm64: dts: ti: k3-am62l3-evm: Add HDMI support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] The DSS display output pins (VOUT0) are incorrectly assigned to the external HDMI bridge's pinctrl instead of the Display Subsystem (DSS).
- [Medium] The `VOUT0_EXTPCLKIN` pad is incorrectly configured as `PIN_OUTPUT`.
- [Medium] The HDMI bridge configuration lacks critical physical state controls (reset GPIO and FET routing switch).
--

--- Patch [2]: [PATCH v3 2/2] arm64: dts: ti: k3-am62l3-evm: Add HDMI support ---
commit a0fd4c63c267b044d2bd1cd9570eb64898918cf9
Author: Devarsh Thakkar <devarsht@ti.com>

arm64: dts: ti: k3-am62l3-evm: Add HDMI support

This patch adds the SII9022 HDMI bridge and HDMI connector nodes, along with
the DPI pinmux configuration connecting VOUT0 to the bridge. It also enables
the DSS and hooks up its DPI output port to the SII9022 bridge input.

> diff --git a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts
> index a1af4571a815d..dd16a73e581ec 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts
[ ... ]
> @@ -192,6 +204,38 @@ exp2: gpio@23 {
>  		bootph-all;
>  	};
>  
> +	sii9022: bridge-hdmi@3b {
> +		compatible = "sil,sii9022";
> +		reg = <0x3b>;
> +		interrupt-parent = <&exp1>;
> +		interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
> +		#sound-dai-cells = <0>;
> +		sil,i2s-data-lanes = < 0 >;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&dpi_pins_default>;

[Severity: Medium]
Should the dpi_pins_default pinctrl be assigned to the &dss node instead of
the sii9022 bridge?

The SoC's display subsystem (DSS) physically drives these output pins. If the
sii9022 bridge unbinds, fails to probe, or suspends independently of the DSS,
it will release the DSS's physical output pins. Conversely, if the DSS is
running, it will not have its pins configured unless the bridge is bound.

Also, shouldn't the sii9022 node have a reset-gpios property defined?

The board's IO expander (exp2) explicitly defines "GPIO_HDMI_RSTn" and
"VOUT0_FET_SEL0". Without the reset-gpios property, the driver cannot bring
the bridge out of reset or recover it from a bad state. Additionally, missing
control for VOUT0_FET_SEL0 could mean the DPI signals physically fail to
route to the HDMI bridge if the bootloader hasn't enabled the FET switch.

> +		bootph-all;
> +
> +		ports {
> +			#address-cells = <1>;
[ ... ]
> +			AM62LX_IOPAD(0x00d0, PIN_OUTPUT, 1) /* (P22) GPMC0_BE1n.VOUT0_DATA21 */
> +			AM62LX_IOPAD(0x00d4, PIN_OUTPUT, 1) /* (N23) GPMC0_WAIT0.VOUT0_DATA22 */
> +			AM62LX_IOPAD(0x00d8, PIN_OUTPUT, 1) /* (N22) GPMC0_WAIT1.VOUT0_DATA23 */
> +			AM62LX_IOPAD(0x00ec, PIN_OUTPUT, 5) /* (M23) GPMC0_CSn2.VOUT0_EXTPCLKIN */

[Severity: Medium]
Is it intentional to configure VOUT0_EXTPCLKIN as PIN_OUTPUT?

Configuring an input pin as an output disables its receiver and actively
drives it. Since the sii9022 HDMI bridge receives the pixel clock from the
SoC (VOUT0_PCLK) and does not supply one, this pin appears to be unused for
this display pipeline and could probably be removed, or configured as
PIN_INPUT if genuinely needed.

> +		>;
> +		bootph-all;
> +	};
> +
[ ... ]
> +&dss {
> +	status = "okay";
> +	bootph-all;
> +};

[Severity: Medium]
As mentioned above, should this &dss node claim the pinctrl-0 assignment
for its own DPI output pins instead of the external HDMI bridge claiming them?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260723102519.3581762-1-s-jain1@ti.com?part=2