From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 279BF36F428; Thu, 23 Jul 2026 16:38:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784824736; cv=none; b=ttrGTbk0pmq8mve4au4lnyuI9j6rbu48EkLoFrYYgjBoRAn36nr+heVS2Yxw07mfjU+zVBcFcfn8F6rNnU3i5agu01bFgSc1zrSygWdGi6gSar9DOYjpUOfg3DxJH8ZN4kl3TYzOeONO8W48+0NdcMiK1Yv93DTjkReeFI63Z8U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784824736; c=relaxed/simple; bh=OAHPvY4BE23yFOBedjwhdqbEYvsiJ2oMhLDpRTUAQy0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=fqgVzo9/74088uIzkmOtc1vgvFh8c5rF+y/BVEIagwvU5mTCdHn1O8UnacRKX31s54TdxtBUli7OjserEzUOl+zZKdjcsZvv/Qiu/vjYJ/o04bPLNYVh6lCxhnNI+BnAJ3RnBrbTuJ+uZyYGNZx6a6YDG9YWVGkb3ZpEiDEC9rw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=I6uSSXoo; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="I6uSSXoo" Received: from killaraus.ideasonboard.com (2001-14ba-70f3-e800--a06.rev.dnainternet.fi [IPv6:2001:14ba:70f3:e800::a06]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 9366819C; Thu, 23 Jul 2026 18:37:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1784824663; bh=OAHPvY4BE23yFOBedjwhdqbEYvsiJ2oMhLDpRTUAQy0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=I6uSSXoobNdpJx3Lvye2UNhET54EydTgPBer27uc949K/tqM5zBoqFiL4gzJTFBol o8+5s/2dQjhL3+OrvlPM6QEhnWT9SmyKfTqXrqsPWndmL173D+0YZ9wrvWipZBGhOv l/ySM3dKVPcb9Cmx5LejaJR4wr6t9CoWBjvf9h7Y= Date: Thu, 23 Jul 2026 19:38:43 +0300 From: Laurent Pinchart To: Conor Dooley Cc: Richard Leitner , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich , Dave Stevenson , Alexander Stein , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, driver-core@lists.linux.dev Subject: Re: [PATCH RFC 1/2] dt-bindings: regmap: add common schema for no-sequential-read Message-ID: <20260723163843.GD767247@killaraus.ideasonboard.com> References: <20260722201622.GD648629@killaraus.ideasonboard.com> <525338f4-cad3-4acb-94c5-a4b71cde9c02@sirena.org.uk> <20260723154541.GA764516@killaraus.ideasonboard.com> <20260723-hamster-juniper-5697cacade96@spud> <20260723161048.GC767247@killaraus.ideasonboard.com> <20260723-empathy-seventh-b4aecf8f1b18@spud> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260723-empathy-seventh-b4aecf8f1b18@spud> On Thu, Jul 23, 2026 at 05:31:25PM +0100, Conor Dooley wrote: > On Thu, Jul 23, 2026 at 07:10:48PM +0300, Laurent Pinchart wrote: > > On Thu, Jul 23, 2026 at 05:02:42PM +0100, Conor Dooley wrote: > > > On Thu, Jul 23, 2026 at 06:45:41PM +0300, Laurent Pinchart wrote: > > > > On Thu, Jul 23, 2026 at 01:01:11PM +0200, Richard Leitner wrote: > > > > > On Wed, Jul 22, 2026 at 11:03:09PM +0100, Mark Brown wrote: > > > > > > On Wed, Jul 22, 2026 at 11:58:46PM +0200, Richard Leitner wrote: > > > > > > > > > > > > > @Mark: I understood that if the fpga really intercepts the I2C bus, it > > > > > > > should be modelled accordingly in device tree. But what would be the > > > > > > > preferred implementation if both devices sit on the same I2C bus, but > > > > > > > one is messing up some register reads on purpose? > > > > > > > > > > > > I think we would need to have a coherent understanding and description > > > > > > of the actual issue to know how to describe it. > > > > > > > > > > Understood. I will try to figure out how the hardware is really wired > > > > > and come back to you. > > > > > > > > Based on the information I have received so far, the FPGA is interposed > > > > between the host and sensor. It could therefore be modelled in DT as > > > > child of the I2C bus and a parent of the sensor. > > > > > > > > New version of some of the Vision Components modules have fixed the > > > > multi-read bug, so we will still need a property in the FPGA DT node to > > > > indicate if the quirk should be activated. > > > > > > Or come up with a compatible for the FPGA DT node that uniquely > > > identifies the revision of the RTL in use. > > > That's my preference for things that use some custom RTL that aren't > > > configuration parameters. > > > > I'm afraid we won't be able to get that information. We have limited > > visibility on the ecosystem of modules and what the FPGA does in each of > > them. > > Oh well, I tried.. Let's look at the bright side: the vendor has fixed the issue after we reported them, so DT for newer modules will be better :-) -- Regards, Laurent Pinchart