From: sashiko-bot@kernel.org
To: "Prathamesh Shete" <pshete@nvidia.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 5/5] arm64: tegra: Add Tegra264 SDMMC1 device tree node
Date: Fri, 24 Jul 2026 08:15:35 +0000 [thread overview]
Message-ID: <20260724081536.39C0A1F00ADE@smtp.kernel.org> (raw)
In-Reply-To: <20260724075700.714261-6-pshete@nvidia.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing pinctrl configuration for SDMMC1 pad voltage switching.
--
--- Patch [5]: [PATCH 5/5] arm64: tegra: Add Tegra264 SDMMC1 device tree node ---
commit 9ce1cc837d5e304cb5792016306e46a502dddf18
Author: Prathamesh Shete <pshete@nvidia.com>
arm64: tegra: Add Tegra264 SDMMC1 device tree node
Add device tree node for the Tegra264 SDMMC1 instance.
> diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> index 2d8e7e37830ff..8b1f45b5c4cb9 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
> @@ -3631,6 +3631,40 @@ i2c16: i2c@c430000 {
> status = "disabled";
> };
>
> + mmc@c570000 {
> + compatible = "nvidia,tegra264-sdhci", "nvidia,tegra194-sdhci";
> + reg = <0x00 0x0c570000 0x0 0x10000>;
[Severity: High]
Does this node need pinctrl configurations to support the declared UHS modes?
This node defines UHS modes (e.g., sd-uhs-sdr104) later in the block but lacks
the corresponding pinctrl-names and pinctrl-x properties required by the
sdhci-tegra driver to safely switch pad voltages.
Because the Tegra264 SDHCI host driver declares NVQUIRK_NEEDS_PAD_CONTROL,
missing these properties causes tegra_sdhci_init_pinctrl_info() to fail during
probe. This skips assigning the sdhci_tegra_start_signal_voltage_switch
callback.
When the MMC core later attempts to switch to 1.8V for the declared UHS modes,
it will fall back to the default sdhci_start_signal_voltage_switch()
implementation. This modifies the controller registers but fails to adjust the
actual Tegra SoC pad driver voltages.
Could this leave the physical pads stuck at 3.3V while negotiating 1.8V,
potentially causing signal integrity issues, data corruption, or hardware
damage when an SD card capable of UHS modes is inserted?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260724075700.714261-1-pshete@nvidia.com?part=5
prev parent reply other threads:[~2026-07-24 8:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-24 7:56 [PATCH 0/5] mmc: tegra: Add Tegra238 and Tegra264 SDHCI support Prathamesh Shete
2026-07-24 7:56 ` [PATCH 1/5] dt-bindings: mmc: tegra: Document Tegra238 SDHCI Prathamesh Shete
2026-07-24 7:56 ` [PATCH 2/5] mmc: sdhci-tegra: Add Tegra238 SoC data Prathamesh Shete
2026-07-24 7:56 ` [PATCH 3/5] dt-bindings: mmc: tegra: Document Tegra264 SDHCI Prathamesh Shete
2026-07-24 7:56 ` [PATCH 4/5] mmc: sdhci-tegra: Add Tegra264 SoC data Prathamesh Shete
2026-07-24 7:56 ` [PATCH 5/5] arm64: tegra: Add Tegra264 SDMMC1 device tree node Prathamesh Shete
2026-07-24 8:15 ` sashiko-bot [this message]
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