From: sashiko-bot@kernel.org
To: "Prasad Kumpatla" <prasad.kumpatla@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v6 5/5] pinctrl: qcom: hawi-lpass-lpi: add Hawi LPASS LPI TLMM
Date: Fri, 24 Jul 2026 14:45:28 +0000 [thread overview]
Message-ID: <20260724144528.9EB851F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260724141708.2212057-6-prasad.kumpatla@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Premature mutex destruction in the driver removal path creates a potential use-after-destroy race condition.
--
--- Patch [5]: [PATCH v6 5/5] pinctrl: qcom: hawi-lpass-lpi: add Hawi LPASS LPI TLMM ---
commit c233c0ac41f2bc46bdca1d1c9ea5842fe1fcc867
Author: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
pinctrl: qcom: hawi-lpass-lpi: add Hawi LPASS LPI TLMM
This commit adds the pin controller driver for the Low Power Audio
SubSystem (LPASS) Low Power Island (LPI) of the Qualcomm Hawi SoC.
The controller supports 23 GPIOs and utilizes the LPI_PINGROUP6 macro
for certain pins due to a test_bus entry.
> diff --git a/drivers/pinctrl/qcom/pinctrl-hawi-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-hawi-lpass-lpi.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/pinctrl/qcom/pinctrl-hawi-lpass-lpi.c
[ ... ]
> +static struct platform_driver lpi_pinctrl_driver = {
> + .driver = {
> + .name = "qcom-hawi-lpass-lpi-pinctrl",
> + .of_match_table = lpi_pinctrl_of_match,
> + .pm = pm_ptr(&lpi_pinctrl_pm_ops),
> + },
> + .probe = lpi_pinctrl_probe,
> + .remove = lpi_pinctrl_remove,
[Severity: High]
This is a pre-existing issue, but I noticed a potential race condition in the
shared removal path being used here.
Can this lead to a use-after-destroy race condition when the device is
unbound?
Looking at the shared lpi_pinctrl_remove() in pinctrl-lpass-lpi.c:
void lpi_pinctrl_remove(struct platform_device *pdev)
{
struct lpi_pinctrl *pctrl = platform_get_drvdata(pdev);
int i;
mutex_destroy(&pctrl->lock);
...
Since devres is used to manage the GPIO chip and pinctrl interfaces
(devm_gpiochip_add_data and devm_pinctrl_register), these interfaces remain
active until the devres release phase, which occurs after lpi_pinctrl_remove()
returns.
If a concurrent request (such as a userspace process accessing the exported
GPIO via sysfs while unbinding) attempts to operate on the GPIOs, won't it
try to lock this destroyed mutex before the devres cleanup has unregistered
the interfaces?
> +};
> +
> +module_platform_driver(lpi_pinctrl_driver);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260724141708.2212057-1-prasad.kumpatla@oss.qualcomm.com?part=5
next prev parent reply other threads:[~2026-07-24 14:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-24 14:17 [PATCH v6 0/5] Subject: [PATCH v6 0/7] ASoC: qcom and pinctrl: add LPASS LPR voting and Hawi LPASS LPI support Prasad Kumpatla
2026-07-24 14:17 ` [PATCH v6 1/5] ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID Prasad Kumpatla
2026-07-24 14:29 ` sashiko-bot
2026-07-24 14:17 ` [PATCH v6 2/5] ASoC: qcom: qdsp6: Increase Q6DSP_MAX_CLK_ID for LPASS LPR vote clock Prasad Kumpatla
2026-07-24 14:34 ` sashiko-bot
2026-07-24 14:17 ` [PATCH v6 3/5] ASoC: qcom: q6prm: add support for LPASS LPR resource voting Prasad Kumpatla
2026-07-24 14:17 ` [PATCH v6 4/5] dt-bindings: pinctrl: qcom,hawi-lpass-lpi-pinctrl: Add Hawi LPI pinctrl Prasad Kumpatla
2026-07-24 14:17 ` [PATCH v6 5/5] pinctrl: qcom: hawi-lpass-lpi: add Hawi LPASS LPI TLMM Prasad Kumpatla
2026-07-24 14:45 ` sashiko-bot [this message]
2026-07-24 14:32 ` [PATCH v6 0/5] Subject: [PATCH v6 0/7] ASoC: qcom and pinctrl: add LPASS LPR voting and Hawi LPASS LPI support Bartosz Golaszewski
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