From: sashiko-bot@kernel.org
To: "Cody Kang" <codykang.hk@gmail.com>
Cc: dri-devel@lists.freedesktop.org, vkoul@kernel.org,
neil.armstrong@linaro.org, robh@kernel.org,
devicetree@vger.kernel.org, olteanv@gmail.com,
conor+dt@kernel.org, linux-phy@lists.infradead.org
Subject: Re: [PATCH 04/17] dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU
Date: Sat, 25 Jul 2026 05:16:00 +0000 [thread overview]
Message-ID: <20260725051600.8EE261F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260724-k3-display-v1-4-f22a10a52867@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly added clock names in the device tree binding do not match the `fw_name` expected by the clock driver, breaking parent clock resolution.
--
--- Patch [4]: [PATCH 04/17] dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU ---
commit 4027b4adb6d5e7a26089ca7f70a25150faf1098a
Author: Cody Kang <codykang.hk@gmail.com>
dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU
The APMU's eDP pixel-clock muxes select the DP PHY PLLs as parents, so the
K3 syscon takes two clock inputs the other variants do not have.
> diff --git a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml
> index d3a7c93c3c54f..b8fc6632a3928 100644
> --- a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml
> +++ b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml
[ ... ]
> @@ -31,14 +31,18 @@ properties:
> maxItems: 1
>
> clocks:
> - maxItems: 4
> + minItems: 4
> + maxItems: 6
>
> clock-names:
> + minItems: 4
> items:
> - const: osc
> - const: vctcxo_1m
> - const: vctcxo_3m
> - const: vctcxo_24m
> + - const: edp0_pll_pxclk
> + - const: edp1_pll_pxclk
[Severity: High]
Will this mismatch with the clock driver's expected firmware names?
Looking at edp0_pclk_parents in drivers/clk/spacemit/ccu-k3.c, the driver
hardcodes the expected device tree string as "external_clk":
drivers/clk/spacemit/ccu-k3.c:edp0_pclk_parents[] = {
...
CCU_PARENT_NAME(external_clk),
...
};
Since this binding strictly mandates "edp0_pll_pxclk" and "edp1_pll_pxclk"
instead of "external_clk", the Common Clock Framework will search the
clock-names array for "external_clk" and fail to resolve the parent clocks
for the eDP pixel clock muxes.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260724-k3-display-v1-0-f22a10a52867@gmail.com?part=4
next prev parent reply other threads:[~2026-07-25 5:16 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-25 3:16 [PATCH 00/17] drm/spacemit: add SpacemiT K3 display support Cody Kang
2026-07-25 3:16 ` [PATCH 01/17] dt-bindings: display: spacemit: add K3 Saturn DPU controller Cody Kang
2026-07-25 3:16 ` [PATCH 02/17] dt-bindings: phy: add SpacemiT K3 Innosilicon DP PHY Cody Kang
2026-07-25 3:16 ` [PATCH 03/17] dt-bindings: display: spacemit: add K3 Innosilicon DP/eDP controller Cody Kang
2026-07-25 3:16 ` [PATCH 04/17] dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU Cody Kang
2026-07-25 5:16 ` sashiko-bot [this message]
2026-07-25 3:16 ` [PATCH 05/17] phy: spacemit: add Innosilicon DP TX PHY driver Cody Kang
2026-07-25 5:16 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 06/17] clk: spacemit: k3: parent eDP/DP pixel clock to the PHY PLL Cody Kang
2026-07-25 3:16 ` [PATCH 07/17] drm/spacemit: add Saturn DPU register model Cody Kang
2026-07-25 3:16 ` [PATCH 08/17] drm/spacemit: add Saturn DPU core types, cmdlist and display MMU Cody Kang
2026-07-25 5:16 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 09/17] drm/spacemit: add Saturn DPU hardware backend Cody Kang
2026-07-25 5:22 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 10/17] drm/spacemit: add Saturn DPU KMS pipeline Cody Kang
2026-07-25 5:18 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 11/17] drm/spacemit: add Saturn DPU DRM device driver Cody Kang
2026-07-25 5:17 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 12/17] drm/spacemit: add Innosilicon DP/eDP controller bridge driver Cody Kang
2026-07-25 5:20 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 13/17] MAINTAINERS: add SpacemiT K3 display driver entry Cody Kang
2026-07-25 3:16 ` [PATCH 14/17] riscv: dts: spacemit: k3: add display nodes Cody Kang
2026-07-25 5:20 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 15/17] riscv: dts: spacemit: k3-pico-itx: enable the DisplayPort output Cody Kang
2026-07-25 5:23 ` sashiko-bot
2026-07-25 3:16 ` [PATCH 16/17] riscv: dts: spacemit: k3-com260-ifx: " Cody Kang
2026-07-25 3:16 ` [PATCH 17/17] riscv: defconfig: spacemit: k3: enable display driver Cody Kang
2026-07-25 6:36 ` [PATCH 00/17] drm/spacemit: add SpacemiT K3 display support Cody Kang
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