From: sashiko-bot@kernel.org
To: "Vishnu Reddy" <busanna.reddy@oss.qualcomm.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org,
media-ci@linuxtv.org, conor+dt@kernel.org
Subject: Re: [PATCH v10 01/14] dt-bindings: media: qcom,glymur-iris: Add glymur video codec
Date: Sun, 26 Jul 2026 06:00:31 +0000 [thread overview]
Message-ID: <20260726060031.861C81F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260726-glymur-v10-1-de451559e88b@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The device tree binding incorrectly defines and requires `#address-cells` and `#size-cells`, forcing conformant device trees to trigger dtc warnings.
--
--- Patch [1]: [PATCH v10 01/14] dt-bindings: media: qcom,glymur-iris: Add glymur video codec ---
commit 6a8af4611de5993b1c0f3d458ae92b3f17956b81
Author: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
dt-bindings: media: qcom,glymur-iris: Add glymur video codec
This commit adds the device tree binding for the Qualcomm Glymur Iris video
codec, a dual-core video IP. It increases the maxItems constraints for clocks
and power-domains in the common venus schema to accommodate the new
architecture.
> diff --git a/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
> new file mode 100644
> index 0000000000000..1bb16206d859b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml
[ ... ]
> + interconnect-names:
> + items:
> + - const: cpu-cfg
> + - const: video-mem
> +
> + '#address-cells':
> + const: 2
> +
> + '#size-cells':
> + const: 2
> +
[Severity: Low]
Does this binding unnecessarily define #address-cells and #size-cells?
Since none of the permitted child nodes (non-pixel, pixel, video-firmware, or
opp-table) have a reg property, and no ranges property is defined, wouldn't
enforcing these properties unconditionally trigger the dtc warning
avoid_unnecessary_addr_size?
> + non-pixel:
> + type: object
[ ... ]
> +required:
> + - clocks
> + - clock-names
> + - compatible
> + - dma-coherent
> + - interconnects
> + - interconnect-names
> + - "#address-cells"
> + - "#size-cells"
[Severity: Low]
Because these properties are marked as required, any conformant device tree
is forced to include them, which will result in the dtc warnings mentioned
above.
> + - non-pixel
> + - pixel
> + - power-domains
[ ... ]
> + resets = <&gcc_video_axi0c_clk_ares>,
> + <&gcc_video_axi0_clk_ares>,
> + <&videocc_mvs0c_freerun_clk_ares>,
> + <&videocc_mvs0_freerun_clk_ares>,
> + <&gcc_video_axi1_clk_ares>,
> + <&videocc_mvs1_freerun_clk_ares>;
> + reset-names = "core_bus",
> + "vcodec0_bus",
> + "core",
> + "vcodec0_core",
> + "vcodec1_bus",
> + "vcodec1_core";
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
[Severity: Low]
Are these properties in the example block propagating this pattern?
By demonstrating them here, it enforces adding properties that aren't used by
the child nodes.
> + non-pixel {
> + iommus = <&apps_smmu 0x1940 0x0000>,
> + <&apps_smmu 0x1944 0x0000>,
> + <&apps_smmu 0x19e0 0x0000>;
> + memory-region = <&iris_resv>;
> + };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260726-glymur-v10-0-de451559e88b@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-07-26 6:00 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-26 5:49 [PATCH v10 00/14] media: iris: Add support for glymur platform Vishnu Reddy
2026-07-26 5:49 ` [PATCH v10 01/14] dt-bindings: media: qcom,glymur-iris: Add glymur video codec Vishnu Reddy
2026-07-26 6:00 ` sashiko-bot [this message]
2026-07-26 5:49 ` [PATCH v10 02/14] media: iris: Add hooks to initialize and tear down context banks Vishnu Reddy
2026-07-26 6:01 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 03/14] media: iris: Add helper to create a context bank device Vishnu Reddy
2026-07-26 6:03 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 04/14] media: iris: Add helper to select relevant " Vishnu Reddy
2026-07-26 6:11 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 05/14] media: iris: Skip DMA mask setting to core device when IOMMU is not mapped Vishnu Reddy
2026-07-26 6:05 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 06/14] media: iris: Enable Secure PAS support with IOMMU managed by Linux Vishnu Reddy
2026-07-26 6:08 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 07/14] media: iris: Replace enum-indexed clock and power domain tables with per-block structures Vishnu Reddy
2026-07-26 6:06 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 08/14] media: iris: Add power sequence for glymur Vishnu Reddy
2026-07-26 6:05 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 09/14] media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook Vishnu Reddy
2026-07-26 6:03 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 10/14] media: iris: Add support to select core for dual core platforms Vishnu Reddy
2026-07-26 6:18 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 11/14] media: iris: Add hooks for pixel and non-pixel context banks Vishnu Reddy
2026-07-26 6:03 ` sashiko-bot
2026-07-26 5:49 ` [PATCH v10 12/14] media: iris: Add platform data for glymur Vishnu Reddy
2026-07-26 5:49 ` [PATCH v10 13/14] arm64: dts: qcom: glymur: Add iris video node Vishnu Reddy
2026-07-26 5:49 ` [PATCH v10 14/14] arm64: dts: qcom: glymur-crd: Enable iris video codec node Vishnu Reddy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260726060031.861C81F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=busanna.reddy@oss.qualcomm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=media-ci@linuxtv.org \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox