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From: sashiko-bot@kernel.org
Subject: Re: [PATCH] arm64: tegra: Add EL2 virtual timer interrupt for
 Tegra194
Reply-To: sashiko-reviews@lists.linux.dev
To: "Jon Hunter" <jonathanh@nvidia.com>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
In-Reply-To: <20260728155059.200363-1-jonathanh@nvidia.com>
References: <20260728155059.200363-1-jonathanh@nvidia.com>
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Date: Tue, 28 Jul 2026 16:21:35 +0000
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Thank you for your contribution! Sashiko AI review found 1 potential issue(=
s) to consider:
- [High] The newly added EL2 virtual timer interrupt specifies GIC_PPI 15, =
but the ARM architectural standard for the EL2 virtual timer is GIC_PPI 12.=
 If the Carmel CPU hardware actually triggers PPI 12, the interrupt will be=
 misrouted, leading to timer stalls when running in VHE mode.
--

--- Patch [1]: [PATCH] arm64: tegra: Add EL2 virtual timer interrupt for Te=
gra194 ---
commit c19a2a2ae7a6be54be1db9d69e5e65ad5a1e8682
Author: Jon Hunter <jonathanh@nvidia.com>
arm64: tegra: Add EL2 virtual timer interrupt for Tegra194

This commit adds the EL2 virtual timer interrupt to the Tegra194 device tree
to resolve a warning generated when running on VHE-capable CPUs. It updates
the timer node by appending a new GIC_PPI definition for the virtual timer.

> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/d=
ts/nvidia/tegra194.dtsi
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -3176,6 +3176,8 @@ timer {
>  			     <GIC_PPI 11
>  				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>  			     <GIC_PPI 10
> +				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 15

[Severity: High]
Is this the correct interrupt number for the EL2 virtual timer on this
platform? The standard ARM architecture definition for the EL2 virtual timer
is GIC_PPI 12, whereas this specifies GIC_PPI 15.

If the Carmel CPU hardware actually triggers PPI 12, could specifying 15 ca=
use
the interrupt to be misrouted and lead to timer stalls when running in VHE
mode?

>  				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>  		interrupt-parent =3D <&gic>;
>  		always-on;

--=20
Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20260728155059.2003=
63-1-jonathanh@nvidia.com?part=3D1