From: Wei Deng <wei.deng@oss.qualcomm.com>
To: konrad.dybcio@oss.qualcomm.com
Cc: wei.deng@oss.qualcomm.com, andersson@kernel.org,
konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, quic_chezhou@quicinc.com,
cheng.jiang@oss.qualcomm.com, shuai.zhang@oss.qualcomm.com,
jinwang.li@oss.qualcomm.com, xiuzhuo.shang@oss.qualcomm.com,
mengshi.wu@oss.qualcomm.com, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: monaco-evk: Describe the PCIe M.2 Key E connector
Date: Wed, 29 Jul 2026 08:06:54 +0530 [thread overview]
Message-ID: <20260729023654.3840494-1-wei.deng@oss.qualcomm.com> (raw)
In-Reply-To: c547f8c1-7a49-4cdf-b1d9-22f00c6035de@oss.qualcomm.com
Hi Konrad,
On Tue, 28 Jul 2026 10:11:30 +0200, Konrad Dybcio wrote:
> On 7/28/26 5:39 AM, Wei Deng wrote:
> > The concern I have with moving these to monaco.dtsi is that other
> > boards sharing the same DTSI (e.g. qcs8300-ride.dts) don't have an
> > M.2 connector. Adding port/endpoint nodes in the SoC DTSI would
> > create dangling endpoints on those boards.
>
> Is that a problem?
>
> Konrad
Fair point. I will move the port/endpoint anchors to monaco.dtsi in v2.
I will also split the series into 3 patches to keep the SoC-level
changes separate from the board-level connector description.
--
Best Regards,
Wei Deng
next reply other threads:[~2026-07-29 2:37 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 2:36 Wei Deng [this message]
-- strict thread matches above, loose matches on Subject: below --
2026-07-28 3:39 [PATCH 2/2] arm64: dts: qcom: monaco-evk: Describe the PCIe M.2 Key E connector Wei Deng
2026-07-28 8:11 ` Konrad Dybcio
2026-07-27 14:16 [PATCH 0/2] arm64: dts: qcom: Describe the PCIe M.2 Key E connector for Monaco EVK Wei Deng
2026-07-27 14:16 ` [PATCH 2/2] arm64: dts: qcom: monaco-evk: Describe the PCIe M.2 Key E connector Wei Deng
2026-07-27 14:39 ` Dmitry Baryshkov
2026-07-27 14:43 ` Konrad Dybcio
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