From: Simon Glass <sjg@chromium.org>
To: Linus Walleij <linusw@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org, Jonas Karlman <jonas@kwiboo.se>,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Conor Dooley <conor+dt@kernel.org>,
linux-rockchip@lists.infradead.org,
Simon Glass <sjg@chromium.org>,
Jeffy Chen <jeffy.chen@rock-chips.com>,
Ye Zhang <ye.zhang@rock-chips.com>, huang lin <hl@rock-chips.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 1/4] pinctrl: rockchip: Decode drive strength in the get function
Date: Wed, 29 Jul 2026 07:27:25 -0600 [thread overview]
Message-ID: <20260729132736.3807082-2-sjg@chromium.org> (raw)
In-Reply-To: <20260729132736.3807082-1-sjg@chromium.org>
The decoding of the 2-bit and 8-bit level drive-strength values sits in
rockchip_set_drive_perpin(), where it is unreachable: the SoCs whose
banks declare these drive types (RK3506 and RV1103B) take the early
ctrl->type branch in the set path, and the read-and-decode logic in a
set function has no purpose. Meanwhile rockchip_get_drive_perpin()
lacks the decoding, so pin_config_get() and the debugfs output report
-EINVAL for these SoCs.
Move the two cases to rockchip_get_drive_perpin(), where they belong.
Fixes: dbd2317d7b9f ("pinctrl: rockchip: Add rk3506 pinctrl support")
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v3:
- Add new patch moving the drive-strength decoding to the get function
drivers/pinctrl/pinctrl-rockchip.c | 38 +++++++++++++++---------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 7e0fcd45fd26..08a46a04a815 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3267,6 +3267,25 @@ static int rockchip_get_drive_perpin(struct rockchip_pin_bank *bank,
case DRV_TYPE_IO_1V8_ONLY:
rmask_bits = RK3288_DRV_BITS_PER_PIN;
break;
+ case DRV_TYPE_IO_LEVEL_2_BIT:
+ ret = regmap_read(regmap, reg, &data);
+ if (ret)
+ return ret;
+ data >>= bit;
+
+ return data & 0x3;
+ case DRV_TYPE_IO_LEVEL_8_BIT:
+ ret = regmap_read(regmap, reg, &data);
+ if (ret)
+ return ret;
+ data >>= bit;
+ data &= (1 << 8) - 1;
+
+ ret = hweight8(data);
+ if (ret > 0)
+ return ret - 1;
+ else
+ return -EINVAL;
default:
dev_err(dev, "unsupported pinctrl drive type: %d\n", drv_type);
return -EINVAL;
@@ -3390,25 +3409,6 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
case DRV_TYPE_IO_1V8_ONLY:
rmask_bits = RK3288_DRV_BITS_PER_PIN;
break;
- case DRV_TYPE_IO_LEVEL_2_BIT:
- ret = regmap_read(regmap, reg, &data);
- if (ret)
- return ret;
- data >>= bit;
-
- return data & 0x3;
- case DRV_TYPE_IO_LEVEL_8_BIT:
- ret = regmap_read(regmap, reg, &data);
- if (ret)
- return ret;
- data >>= bit;
- data &= (1 << 8) - 1;
-
- ret = hweight8(data);
- if (ret > 0)
- return ret - 1;
- else
- return -EINVAL;
default:
dev_err(dev, "unsupported pinctrl drive type: %d\n", drv_type);
return -EINVAL;
--
2.43.0
next prev parent reply other threads:[~2026-07-29 13:30 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 13:27 [PATCH v3 0/4] pinctrl: Add support for the Rockchip RV1106 Simon Glass
2026-07-29 13:27 ` Simon Glass [this message]
2026-07-29 13:42 ` [PATCH v3 1/4] pinctrl: rockchip: Decode drive strength in the get function sashiko-bot
2026-07-29 13:27 ` [PATCH v3 2/4] dt-bindings: gpio: rockchip,gpio-bank: Add rockchip,grf property Simon Glass
2026-07-29 13:46 ` sashiko-bot
2026-07-29 13:27 ` [PATCH v3 3/4] dt-bindings: pinctrl: rockchip: Add RV1106 compatible Simon Glass
2026-07-29 13:48 ` sashiko-bot
2026-07-29 13:27 ` [PATCH v3 4/4] pinctrl: rockchip: Add RV1106 pinctrl support Simon Glass
2026-07-29 13:47 ` sashiko-bot
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