Re: [PATCH 1/2] arm64: dts: rockchip: enable CAN0 on RK3588 Jaguar

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Missing `pinctrl` pin multiplexing configuration for the CAN0 interface.
- [Low] Undefined device tree label `&can0` causing DTC build failure.
--

--- Patch [1]: [PATCH 1/2] arm64: dts: rockchip: enable CAN0 on RK3588 Jaguar ---
commit 15a700b1846dc901ddd98173bf7c79852fd78bed
Author: Quentin Schulz <quentin.schulz@cherry.de>

arm64: dts: rockchip: enable CAN0 on RK3588 Jaguar

This commit enables the CAN0 interface on the RK3588 Jaguar, which is
exposed on the P5 connector on the SBC.

> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
> index 41758fe7d3689..ed6c1162bd821 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
[ ... ]
> @@ -195,6 +195,12 @@ vcc5v0_usb: regulator-vcc5v0-usb {
>  	};
>  };
>  

[Severity: Low]
Does the can0 label exist in the base rk3588.dtsi or its includes? It appears
this might cause a Device Tree Compiler (DTC) build failure if the label is
undefined in the current tree.

[Severity: Medium]
Will this interface require an explicit pinctrl-0 property to correctly route
the CAN signals to the physical pins on the P5 connector? Assuming the can0
node is provided by a prerequisite patch, the CAN interface might fail to
communicate physically if the default pin multiplexing doesn't match this
board's routing.

> +&can0 {
> +	assigned-clocks = <&cru CLK_CAN0>;
> +	assigned-clock-rates = <300000000>;
> +	status = "okay";
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260730-jaguar-can-v1-0-9b566bd785da@cherry.de?part=1