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Fri, 31 Jul 2026 10:46:15 -0700 (PDT) Received: from inhnjlux1020.ls.ege.ds ([49.204.164.242]) by smtp.gmail.com with ESMTPSA id 5614622812f47-4af58ce0a1bsm1156853b6e.2.2026.07.31.10.46.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 10:46:15 -0700 (PDT) From: Udaya Kiran Challa To: linusw@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: skhan@linuxfoundation.org, me@brighamcampbell.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Udaya Kiran Challa Subject: [PATCH v5 1/2] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Date: Fri, 31 Jul 2026 23:15:51 +0530 Message-Id: <20260731174551.86367-1-challauday369@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Convert Microchip PIC32 Pin Controller devicetree binding from legacy text format to DT schema. Signed-off-by: Udaya Kiran Challa --- Changelog: Changes since v4: - Add reference to pincfg-node.yaml Link to v4:https://lore.kernel.org/all/20260722123243.341346-1-challauday369@gmail.com/ Changes since v3: - Drop "|" from description fields - Remove '#address-cells' and '#size-cells' properties from the schema - Consolidate repeated pin-node property definitions into a single $defs/pin-node entry - Replace the two patternProperties blocks with additionalProperties using oneOf to allow either: - container nodes holding nested pin configuration nodes, or - direct pin configuration nodes. - Update $ref to use the absolute schema path /schemas/pinctrl/pinmux-node.yaml# Link to v3:https://lore.kernel.org/all/20260719183431.124061-1-challauday369@gmail.com/ Changes since v2: - Add container node for grouped pin configuration sub-nodes - Correct regex patterns of direct and nested child nodes - Fix interrupts values in uart2 example Link to v2:https://lore.kernel.org/all/20260707144223.120417-1-challauday369@gmail.com/ Changes since v1: - Add interrupts and clocks to uart2 example to satisfy uart schema validation - Corect regex patterns to accept standard DT node naming conventions - Add function property to top-level pin configuration nodes - Remove restrictive enum from function property to support all mux functions Link to v1:https://lore.kernel.org/all/20260705132521.159522-1-challauday369@gmail.com/ --- .../pinctrl/microchip,pic32-pinctrl.txt | 60 ---------- .../pinctrl/microchip,pic32mzda-pinctrl.yaml | 109 ++++++++++++++++++ 2 files changed, 109 insertions(+), 60 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt deleted file mode 100644 index 51efd2085113..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt +++ /dev/null @@ -1,60 +0,0 @@ -* Microchip PIC32 Pin Controller - -Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and -../interrupt-controller/interrupts.txt for generic information regarding -pin controller, GPIO, and interrupt bindings. - -PIC32 'pin configuration node' is a node of a group of pins which can be -used for a specific device or function. This node represents configurations of -pins, optional function, and optional mux related configuration. - -Required properties for pin controller node: - - compatible: "microchip,pic32mada-pinctrl" - - reg: Address range of the pinctrl registers. - - clocks: Clock specifier (see clock bindings for details) - -Required properties for pin configuration sub-nodes: - - pins: List of pins to which the configuration applies. - -Optional properties for pin configuration sub-nodes: ----------------------------------------------------- - - function: Mux function for the specified pins. - - bias-pull-up: Enable weak pull-up. - - bias-pull-down: Enable weak pull-down. - - input-enable: Set the pin as an input. - - output-low: Set the pin as an output level low. - - output-high: Set the pin as an output level high. - - microchip,digital: Enable digital I/O. - - microchip,analog: Enable analog I/O. - -Example: - -pic32_pinctrl: pinctrl@1f801400{ - #address-cells = <1>; - #size-cells = <1>; - compatible = "microchip,pic32mzda-pinctrl"; - reg = <0x1f801400 0x400>; - clocks = <&rootclk PB1CLK>; - - pinctrl_uart2: pinctrl_uart2 { - uart2-tx { - pins = "G9"; - function = "U2TX"; - microchip,digital; - output-low; - }; - uart2-rx { - pins = "B0"; - function = "U2RX"; - microchip,digital; - input-enable; - }; - }; -}; - -uart2: serial@1f822200 { - compatible = "microchip,pic32mzda-uart"; - reg = <0x1f822200 0x50>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml new file mode 100644 index 000000000000..dcaa87d9a30b --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/microchip,pic32mzda-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PIC32 Pin Controller + +maintainers: + - Linus Walleij + +description: + PIC32 pin configuration node is a node of a group of pins which can be used + for a specific device or function. This node represents configurations of + pins, optional function, and optional mux related configuration. + +properties: + compatible: + const: microchip,pic32mzda-pinctrl + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +$defs: + pin-node: + type: object + allOf: + - $ref: /schemas/pinctrl/pincfg-node.yaml# + - $ref: /schemas/pinctrl/pinmux-node.yaml# + + properties: + pins: + description: List of pins to which the configuration applies. + items: + type: string + minItems: 1 + + function: true + + bias-pull-up: true + bias-pull-down: true + input-enable: true + output-low: true + output-high: true + + microchip,digital: + description: Enable digital I/O. + type: boolean + + microchip,analog: + description: Enable analog I/O. + type: boolean + + required: + - pins + + unevaluatedProperties: false + +additionalProperties: + oneOf: + - additionalProperties: + $ref: '#/$defs/pin-node' + - $ref: '#/$defs/pin-node' + +required: + - compatible + - reg + - clocks + +examples: + - | + #include + #include + + pic32_pinctrl: pinctrl@1f801400 { + compatible = "microchip,pic32mzda-pinctrl"; + reg = <0x1f801400 0x400>; + clocks = <&rootclk PB1CLK>; + + pinctrl_uart2: pinctrl_uart2 { + uart2-tx { + pins = "G9"; + function = "U2TX"; + microchip,digital; + output-low; + }; + + uart2-rx { + pins = "B0"; + function = "U2RX"; + microchip,digital; + input-enable; + }; + }; + }; + + uart2: serial@1f822200 { + compatible = "microchip,pic32mzda-uart"; + reg = <0x1f822200 0x50>; + interrupts = <145 IRQ_TYPE_LEVEL_HIGH>, + <146 IRQ_TYPE_LEVEL_HIGH>, + <147 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rootclk PB2CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + }; -- 2.34.1