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[2001:8b0:fb11:0:3889:86e0:d449:e2e1]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-49807b9441csm63964405e9.4.2026.08.01.09.54.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Aug 2026 09:54:32 -0700 (PDT) From: Peter Robinson To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Broadcom internal kernel review list , Stefan Wahren , Phil Elwell , devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Florian Fainelli , Dave Stevenson , Andrea della Porta Cc: Peter Robinson Subject: [PATCH v3] arm64: dts: broadcom: bcm2712: adjust display status Date: Sat, 1 Aug 2026 17:54:26 +0100 Message-ID: <20260801165430.598302-1-pbrobinson@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Typically non critical IP in a SoC are disabled by default in the SoC .dtsi and enabled on board specific configs. There are usecases, such as some CM5 carrier boards, where display output may not be desired or connected. So disable them on the SoC .dtsi and enable them on the RPi5 board. Signed-off-by: Peter Robinson Cc: Florian Fainelli Cc: Dave Stevenson Cc: Andrea della Porta Fixes: 25d77bdd7df2 ("arm64: dts: broadcom: Add display pipeline support to BCM2712") --- v2: rebase to align with upstream changes v3: re-add missed vc4 okay status .../dts/broadcom/bcm2712-rpi-5-b-base.dtsi | 35 +++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 11 ++++++ 2 files changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi index b7a6bc34ae1ab..d998bfae91acb 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi @@ -104,6 +104,18 @@ wl_on_reg: wl-on-reg { }; }; +&ddc0 { + status = "okay"; +}; + +&ddc1 { + status = "okay"; +}; + +&disp_intr { + status = "okay"; +}; + &pinctrl { bt_shutdown_default: bt-shutdown-default-state { function = "gpio"; @@ -230,16 +242,27 @@ bluetooth: bluetooth { &hvs { clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; clock-names = "core", "disp"; + status = "okay"; }; &hdmi0 { clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; clock-names = "hdmi", "bvb", "audio", "cec"; + status = "okay"; }; &hdmi1 { clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; clock-names = "hdmi", "bvb", "audio", "cec"; + status = "okay"; +}; + +&mop { + status = "okay"; +}; + +&moplet { + status = "okay"; }; &pcie1 { @@ -250,6 +273,18 @@ &pcie2 { status = "okay"; }; +&pixelvalve0 { + status = "okay"; +}; + +&pixelvalve1 { + status = "okay"; +}; + &v3d { clocks = <&firmware_clocks 5>; }; + +&vc4 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi index 761c59d90ffc9..9b36ecd7bba54 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -359,12 +359,14 @@ pixelvalve0: pixelvalve@7c410000 { compatible = "brcm,bcm2712-pixelvalve0"; reg = <0x7c410000 0x100>; interrupts = ; + status = "disabled"; }; pixelvalve1: pixelvalve@7c411000 { compatible = "brcm,bcm2712-pixelvalve1"; reg = <0x7c411000 0x100>; interrupts = ; + status = "disabled"; }; mop: mop@7c500000 { @@ -372,6 +374,7 @@ mop: mop@7c500000 { reg = <0x7c500000 0x28>; interrupt-parent = <&disp_intr>; interrupts = <1>; + status = "disabled"; }; moplet: moplet@7c501000 { @@ -379,6 +382,7 @@ moplet: moplet@7c501000 { reg = <0x7c501000 0x20>; interrupt-parent = <&disp_intr>; interrupts = <0>; + status = "disabled"; }; disp_intr: interrupt-controller@7c502000 { @@ -387,6 +391,7 @@ disp_intr: interrupt-controller@7c502000 { interrupts = ; interrupt-controller; #interrupt-cells = <1>; + status = "disabled"; }; dvp: clock@7c700000 { @@ -405,6 +410,7 @@ ddc0: i2c@7d508200 { clock-frequency = <97500>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; ddc1: i2c@7d508280 { @@ -415,6 +421,7 @@ ddc1: i2c@7d508280 { clock-frequency = <97500>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; bsc_irq: interrupt-controller@7d508380 { @@ -460,6 +467,7 @@ hdmi0: hdmi@7c701400 { interrupt-names = "cec-tx", "cec-rx", "cec-low", "hpd-connected", "hpd-removed"; ddc = <&ddc0>; + status = "disabled"; }; hdmi1: hdmi@7c706400 { @@ -489,6 +497,7 @@ hdmi1: hdmi@7c706400 { interrupt-names = "cec-tx", "cec-rx", "cec-low", "hpd-connected", "hpd-removed"; ddc = <&ddc1>; + status = "disabled"; }; }; @@ -667,6 +676,7 @@ v3d: gpu@1002000000 { vc4: gpu { compatible = "brcm,bcm2712-vc6"; + status = "disabled"; }; timer { @@ -703,5 +713,6 @@ hvs: hvs@107c580000 { interrupt-parent = <&disp_intr>; interrupts = <2>, <9>, <16>; interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof"; + status = "disabled"; }; }; -- 2.55.0