From: Krzysztof Kozlowski <krzk@kernel.org>
To: Biju <biju.das.au@gmail.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>, David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Luca Ceresoli <luca.ceresoli@bootlin.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v2 01/16] dt-bindings: display: bridge: renesas,dsi: Document RZ/G3L
Date: Mon, 3 Aug 2026 10:34:07 +0200 [thread overview]
Message-ID: <20260803-prodigious-brave-myna-08deb7@quoll> (raw)
In-Reply-To: <20260729125516.230757-2-biju.das.jz@bp.renesas.com>
On Wed, Jul 29, 2026 at 01:54:53PM +0100, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> The RZ/G3L DSI IP is similar to the RZ/G2L but has different global PHY
> timings and also the PLLCLK is ungateble clock. Add the compatible
> string "renesas,r9a08g046-mipi-dsi" to handle these difference for the
> Renesas RZ/G3L SoC. The power to DSI region is controlled by SYSC block.
> Document renesas,sysc-pwrrdy property to handle the power control.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v1->v2:
> * Dropped renesas,sysc-pwrrdy property as it is modelled as power
> sequence.
> ---
> .../devicetree/bindings/display/bridge/renesas,dsi.yaml | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-08-03 8:34 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 12:54 [PATCH v2 00/16] Add support for DU, LVDS and DSI on the Renesas RZ/G3L SoC Biju
2026-07-29 12:54 ` [PATCH v2 01/16] dt-bindings: display: bridge: renesas,dsi: Document RZ/G3L Biju
2026-08-03 8:34 ` Krzysztof Kozlowski [this message]
2026-08-03 8:36 ` Biju Das
2026-08-05 13:17 ` Biju Das
2026-07-29 12:54 ` [PATCH v2 07/16] dt-bindings: display: renesas,rzg2l-du: Document RZ/G3L SoC Biju
2026-08-03 8:34 ` Krzysztof Kozlowski
2026-08-05 13:18 ` Biju Das
2026-07-29 12:55 ` [PATCH v2 09/16] dt-bindings: display: bridge: Document Renesas RZ/G3L LVDS encoder Biju
2026-08-05 13:19 ` Biju Das
2026-07-29 12:55 ` [PATCH v2 11/16] arm64: dts: renesas: r9a08g046: Add fcpvd node Biju
2026-08-05 16:12 ` Tommaso Merciai
2026-07-29 12:55 ` [PATCH v2 12/16] arm64: dts: renesas: r9a08g046: Add vspd node Biju
2026-08-05 16:14 ` Tommaso Merciai
2026-07-29 12:55 ` [PATCH v2 13/16] arm64: dts: renesas: r9a08g046: Add DU and DSI nodes Biju
2026-07-29 12:55 ` [PATCH v2 14/16] arm64: dts: renesas: r9a08g046: Add LVDS node Biju
2026-07-29 12:55 ` [PATCH v2 15/16] arm64: dts: renesas: Add DSI overlay for RZ/G3L SMARC EVK with ADV7535 Biju
2026-07-29 12:55 ` [PATCH v2 16/16] arm64: dts: renesas: Add LVDS overlay for RZ/G3L SMARC EVK with ITE6263 Biju
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