From: sashiko-bot@kernel.org
To: "Chi-Wen Weng" <cwweng.linux@gmail.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2] spi: ma35d1-qspi: Enable GPIO chip selects
Date: Mon, 03 Aug 2026 06:38:30 +0000 [thread overview]
Message-ID: <20260803063830.BD7461F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260803062444.1649057-1-cwweng.linux@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The driver improperly restricts the total number of chip selects (`num_cs`) to the hardware's native maximum, causing probe to fail for valid device tree configurations that explicitly declare additional GPIO chip selects.
--
--- Patch [1]: [PATCH v2] spi: ma35d1-qspi: Enable GPIO chip selects ---
commit 9b36effcfaa138327c6207a2889e09445f4ecaba
Author: Chi-Wen Weng <cwweng@nuvoton.com>
spi: ma35d1-qspi: Enable GPIO chip selects
The generic SPI controller binding allows GPIO-based chip selects, but
the MA35D1 QSPI driver does not currently enable the SPI core's GPIO
descriptor handling. Enable GPIO chip-select support and specify that
the controller provides two native chip selects.
> diff --git a/drivers/spi/spi-ma35d1-qspi.c b/drivers/spi/spi-ma35d1-qspi.c
> index 541d5d72484cf..60e082de58f51 100644
> --- a/drivers/spi/spi-ma35d1-qspi.c
> +++ b/drivers/spi/spi-ma35d1-qspi.c
[ ... ]
> @@ -613,10 +624,13 @@ static int nuvoton_qspi_probe(struct platform_device *pdev)
> num_cs);
>
> ctlr->num_chipselect = num_cs;
> + ctlr->max_native_cs = NUVOTON_QSPI_MAX_NUM_CS;
> + ctlr->use_gpio_descriptors = true;
[Severity: Medium]
Since this patch enables GPIO chip selects, shouldn't the driver allow
configurations where the total number of chip selects exceeds the native
maximum?
In nuvoton_qspi_probe() just above this diff, there is a check:
if (!num_cs || num_cs > NUVOTON_QSPI_MAX_NUM_CS)
return dev_err_probe(dev, -EINVAL, "invalid num-cs %u\n",
num_cs);
If a device tree explicitly defines a higher value for num-cs (for example
num-cs = <3>) to declare additional GPIO chip selects alongside the native
ones, this check will cause the probe to fail with -EINVAL, preventing
any devices on the bus from functioning.
> ctlr->max_transfer_size = nuvoton_qspi_max_transfer_size;
> ctlr->max_message_size = nuvoton_qspi_max_message_size;
> ctlr->mem_ops = &nuvoton_qspi_mem_ops;
> ctlr->mem_caps = &nuvoton_qspi_mem_caps;
> + ctlr->setup = nuvoton_qspi_setup;
> ctlr->set_cs = nuvoton_qspi_set_cs;
> ctlr->transfer_one = nuvoton_qspi_transfer_one;
> ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260803062444.1649057-1-cwweng.linux@gmail.com?part=1
next prev parent reply other threads:[~2026-08-03 6:38 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-31 2:38 [PATCH v5 0/2] spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller Chi-Wen Weng
2026-07-31 2:38 ` [PATCH v5 1/2] dt-bindings: spi: nuvoton,ma35d1-qspi: Add Nuvoton MA35D1 QSPI Chi-Wen Weng
2026-07-31 20:28 ` Mark Brown
2026-08-03 2:06 ` Chi-Wen Weng
2026-08-03 6:24 ` [PATCH v2] spi: ma35d1-qspi: Enable GPIO chip selects Chi-Wen Weng
2026-08-03 6:38 ` sashiko-bot [this message]
2026-08-03 7:49 ` [PATCH v3 0/2] spi: ma35d1-qspi: Enable GPIO chip-select support Chi-Wen Weng
2026-08-03 7:49 ` [PATCH v3 1/2] dt-bindings: spi: nuvoton,ma35d1-qspi: Allow additional GPIO chip selects Chi-Wen Weng
2026-08-04 7:05 ` Krzysztof Kozlowski
2026-08-04 7:33 ` Chi-Wen Weng
2026-08-03 7:49 ` [PATCH v3 2/2] spi: ma35d1-qspi: Enable " Chi-Wen Weng
2026-08-03 12:30 ` [PATCH v3 0/2] spi: ma35d1-qspi: Enable GPIO chip-select support Mark Brown
2026-08-04 1:57 ` Chi-Wen Weng
2026-07-31 2:38 ` [PATCH v5 2/2] spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller support Chi-Wen Weng
2026-07-31 20:29 ` [PATCH v5 0/2] spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller Mark Brown
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