Devicetree
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From: sashiko-bot@kernel.org
To: "Tomer Maimon" <tmaimon77@gmail.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v9 3/5] arm64: dts: nuvoton: npcm845: Add peripheral nodes
Date: Mon, 03 Aug 2026 11:33:17 +0000	[thread overview]
Message-ID: <20260803113318.826E71F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260803111906.1931384-4-tmaimon77@gmail.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] Devicetree nodes within the `ahb` and `apb` buses are not sorted numerically by their unit addresses.
- [Low] Minor formatting and syntax style issues in node labels and properties.
--

--- Patch [3]: [PATCH v9 3/5] arm64: dts: nuvoton: npcm845: Add peripheral nodes ---
commit 40205ec616b5665717362a923f82f6de6bd0594e
Author: Tomer Maimon <tmaimon77@gmail.com>

arm64: dts: nuvoton: npcm845: Add peripheral nodes

Extend the NPCM845 SoC DTSI with the peripheral controller nodes needed
by the evaluation board and downstream platforms. This adds various 
controllers including Ethernet MACs, USB controllers, MMC, FIU, RNG, ADC, 
PWM/FAN, PSPI, I2C buses, and the OP-TEE firmware node.

> diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> index 545034ac11a03..32ee8d284d1c8 100644
> --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
> +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
[ ... ]
> +		fiu1: spi@fb002000 {
> +			compatible = "nuvoton,npcm845-fiu";
[ ... ]
> +		};
> +
> +		fiu3: spi@c0000000 {

[Severity: Low]
This isn't a bug, but should these FIU nodes in the ahb bus be sorted 
numerically by their unit addresses? It looks like spi@c0000000 is placed 
after spi@fb002000.

[ ... ]
> +			adc: adc@c000 {
> +				compatible = "nuvoton,npcm845-adc";
> +				reg = <0xC000 0x8>;

[Severity: Low]
This isn't a bug, but should this reg property use lowercase hex (0xc000) 
to match the unit address and standard Devicetree conventions?

[ ... ]
> +			i2c26: i2c@fff0a000 {
> +				reg = <0xfff0a000 0x1000>;
[ ... ]
> +			};
> +
> +			peci: peci-controller@100000 {

[Severity: Low]
This isn't a bug, but the newly added I2C nodes (at 0xfff00000 and above) 
are grouped by peripheral type and placed before the PECI controller at 
0x100000. Does this arrangement skip the standard Devicetree coding 
style guideline to order nodes strictly by unit address?

[ ... ]
> +			pwm_fan:pwm-fan-controller@103000 {
> +				compatible = "nuvoton,npcm845-pwm-fan";
> +				reg = <0x103000 0x3000>,
> +					<0x180000 0x8000>;
> +				reg-names = "pwm", "fan";
> +				clocks =  <&clk NPCM8XX_CLK_APB3>,
> +					<&clk NPCM8XX_CLK_APB4>;
> +				clock-names = "pwm","fan";

[Severity: Low]
This isn't a bug, but is it possible to add the missing space after the colon 
in the node label (pwm_fan: pwm-fan-controller) and after the comma in the 
clock-names property ("pwm", "fan")?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260803111906.1931384-1-tmaimon77@gmail.com?part=3

  reply	other threads:[~2026-08-03 11:33 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-03 11:19 [PATCH v9 0/5] arm64: dts: nuvoton: add NPCM845 SoC and EVB support Tomer Maimon
2026-08-03 11:19 ` [PATCH v9 1/5] arm64: dts: nuvoton: npcm845: Drop redundant timer clock-names Tomer Maimon
2026-08-03 11:19 ` [PATCH v9 2/5] arm64: dts: nuvoton: npcm845: Reorder timer0 and PECI nodes Tomer Maimon
2026-08-03 11:19 ` [PATCH v9 3/5] arm64: dts: nuvoton: npcm845: Add peripheral nodes Tomer Maimon
2026-08-03 11:33   ` sashiko-bot [this message]
2026-08-03 11:19 ` [PATCH v9 4/5] arm64: dts: nuvoton: npcm845-evb: Fix DTS coding style Tomer Maimon
2026-08-03 11:19 ` [PATCH v9 5/5] arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes Tomer Maimon

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