From: sashiko-bot@kernel.org
To: "Varshini Rajendran" <varshini.rajendran@microchip.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 04/17] iio: adc: at91-sama5d2_adc: rework temp calibration layout handling
Date: Tue, 04 Aug 2026 11:56:24 +0000 [thread overview]
Message-ID: <20260804115625.8BA691F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260804113338.261782-5-varshini.rajendran@microchip.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The calibration data tag is defined and its layout index is configured, but it is never checked against the NVMEM data.
--
--- Patch [4]: [PATCH v5 04/17] iio: adc: at91-sama5d2_adc: rework temp calibration layout handling ---
commit 49b1bddcd8cc36f48960bba2752d5b3937516cd8
Author: Varshini Rajendran <varshini.rajendran@microchip.com>
iio: adc: at91-sama5d2_adc: rework temp calibration layout handling
Extend support to handle different temperature calibration layouts. Add a
temperature calibration data layout structure to describe indexes of the
factors P1, P4, P6, tag, minimum length of the packet and the scaling
factors for P1 (p1_scale) which are SoC-specific instead of the older non
scalable id structure.
> diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
> index 09390f082fc48..82db8f2f4db03 100644
> --- a/drivers/iio/adc/at91-sama5d2_adc.c
> +++ b/drivers/iio/adc/at91-sama5d2_adc.c
[ ... ]
> @@ -444,6 +445,27 @@ static const struct at91_adc_reg_layout sama7g5_layout = {
> #define at91_adc_writel(st, reg, val) \
> writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
>
> +/* Temperature calibration tag "ACST" in ASCII */
> +#define AT91_TEMP_CALIB_TAG_ACST 0x41435354
> +
> +/**
> + * struct at91_adc_temp_calib_layout - temperature calibration packet layout
> + * @tag_idx: index of Packet tag in the NVMEM cell buffer
> + * @p1_idx: index of FT1_TEMP, equivalent to P1 in the NVMEM cell buffer
> + * @p4_idx: index of FT1_VPAT, equivalent to P4 in the NVMEM cell buffer
> + * @p6_idx: index of FT2_VBG, equivalent to P6 in the NVMEM cell buffer
> + * @min_len: minimum number of u32 words expected in the NVMEM cell buffer
> + * @p1_scale: scaling factor applied to P1 to convert to millicelcius
> + */
> +struct at91_adc_temp_calib_layout {
> + unsigned int tag_idx;
> + unsigned int p1_idx;
> + unsigned int p4_idx;
> + unsigned int p6_idx;
> + unsigned int min_len;
> + struct u32_fract p1_scale;
> +};
> +
[ ... ]
> @@ -2270,20 +2297,23 @@ static int at91_adc_temp_sensor_init(struct at91_adc_state *st,
> return dev_err_probe(dev, PTR_ERR(buf),
> "Failed to read calibration data!\n");
>
> - if (len < AT91_ADC_TS_CLB_IDX_MAX * sizeof(*buf)) {
> + if (len < layout->min_len * sizeof(*buf)) {
[Severity: Medium]
Should there be a check here to validate the packet tag?
The commit defines AT91_TEMP_CALIB_TAG_ACST and adds tag_idx to the layout
struct, but they do not appear to be used to validate the NVMEM buffer
content before it is parsed.
> dev_err(dev, "Invalid calibration data!\n");
> return -EINVAL;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260804113338.261782-1-varshini.rajendran@microchip.com?part=4
next prev parent reply other threads:[~2026-08-04 11:56 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-04 11:33 [PATCH v5 00/17] Add thermal management support for sama7d65 Varshini Rajendran
2026-08-04 11:33 ` [PATCH v5 01/17] dt-bindings: iio: adc: at91-sama5d2: document sama7d65 Varshini Rajendran
2026-08-04 11:33 ` [PATCH v5 02/17] nvmem: add DEFINE_FREE for nvmem_cell_put cleanup Varshini Rajendran
2026-08-04 11:44 ` sashiko-bot
2026-08-05 0:38 ` Jonathan Cameron
2026-08-04 11:33 ` [PATCH v5 03/17] iio: adc: at91-sama5d2_adc: use cleanup.h for NVMEM buffer Varshini Rajendran
2026-08-04 11:33 ` [PATCH v5 04/17] iio: adc: at91-sama5d2_adc: rework temp calibration layout handling Varshini Rajendran
2026-08-04 11:56 ` sashiko-bot [this message]
2026-08-04 11:33 ` [PATCH v5 05/17] iio: adc: at91-sama5d2_adc: add condition to validate calibration data Varshini Rajendran
2026-08-04 11:55 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 06/17] iio: adc: at91-sama5d2_adc: remove unnecessary casts in of_device_id Varshini Rajendran
2026-08-04 11:33 ` [PATCH v5 07/17] iio: adc: at91-sama5d2_adc: adapt the driver for sama7d65 Varshini Rajendran
2026-08-04 12:08 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 08/17] dt-bindings: nvmem: microchip,sama7g5-otpc: add sama7d65 and dt node example Varshini Rajendran
2026-08-04 12:15 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 09/17] nvmem: microchip-otpc: nvmem: microchip-otpc: add tag-based packet lookup Varshini Rajendran
2026-08-04 12:27 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 10/17] nvmem: microchip-otpc: nvmem: add emulation mode and OTP access validation Varshini Rajendran
2026-08-04 12:24 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 11/17] ARM: dts: microchip: sama7d65: add cpu opps Varshini Rajendran
2026-08-04 12:39 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 12/17] ARM: dts: microchip: sama7d65: Add ADC node Varshini Rajendran
2026-08-04 12:34 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 13/17] ARM: dts: microchip: sama7d65_curiosity: Enable ADC, DVFS Varshini Rajendran
2026-08-04 11:33 ` [PATCH v5 14/17] ARM: dts: microchip: sama7d65: add otpc node Varshini Rajendran
2026-08-04 12:53 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 15/17] ARM: dts: microchip: sama7d65: add cells for temperature calibration Varshini Rajendran
2026-08-04 12:51 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 16/17] ARM: dts: microchip: sama7d65: add temperature sensor Varshini Rajendran
2026-08-04 13:10 ` sashiko-bot
2026-08-04 11:33 ` [PATCH v5 17/17] ARM: dts: microchip: sama7d65: add thermal zones node Varshini Rajendran
2026-08-05 0:48 ` [PATCH v5 00/17] Add thermal management support for sama7d65 Jonathan Cameron
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