Re: [PATCH v9 6/7] arm64: dts: imx8mm: imx8mp: Add FIO1 DTOs for Data Modul i.MX8M Mini and Plus eDM SBC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Device Tree node collision and hardware I2C address conflict for io-expander@20 on i.MX8MP.
- [High] Incorrect UART role configuration for RS485 on i.MX8MP.
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--- Patch [6]: [PATCH v9 6/7] arm64: dts: imx8mm: imx8mp: Add FIO1 DTOs for Data Modul i.MX8M Mini and Plus eDM SBC ---
commit a7ddf5cabeef2078bf36b166e42e85f54f0b7289
Author: Marek Vasut <marex@nabladev.com>

arm64: dts: imx8mm: imx8mp: Add FIO1 DTOs for Data Modul i.MX8M Mini and Plus eDM SBC

This commit adds a Device Tree overlay for the eDM-MOD-iMX8Mm-FIO1 feature
connector expansion module. The adapter provides additional interfaces like
UARTs, CAN, PWM Beeper, I2C, SPI, and GPIO, and can be optionally populated
onto the eDM SBC.

> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi
> new file mode 100644
> index 0000000000000..905db21d57c21
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi

[ ... ]

> +&i2c_feature {	/* Feature connector I2C */
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	gpio_feature: io-expander@20 {
> +		compatible = "nxp,pca9554";
> +		reg = <0x20>;

[Severity: High]
Does this cause a device tree node collision on the i.MX8MP?

When this shared FIO1 overlay is applied to the i.MX8MP baseboard, it
appears this will overwrite the statically defined gpiolvds: io-expander@20
node on the &i2c2 bus (aliased as &i2c_feature).

This would replace the LVDS GPIO line names and interrupt configurations with
the FIO1 configurations, potentially breaking the LVDS expander controls.

Also, does physically connecting the FIO1 expansion board to the i.MX8MP SBC
cause a hardware I2C address collision at 0x20 on i2c2?

[ ... ]

> +&uart1 {	/* J500/J501 */
> +	status = "okay";
> +};
> +
> +&uart2 {	/* RS485 J302/J303 */
> +	linux,rs485-enabled-at-boot-time;
> +	uart-has-rtscts;
> +	status = "okay";
> +};

[Severity: High]
Are these UART role configurations correct for both i.MX8MM and i.MX8MP?

The shared overlay hardcodes &uart2 as RS485 and &uart1 as standard UART,
which is correct for i.MX8MM. However, the i.MX8MP baseboard appears to
rely on &uart1 for RS485 and &uart2 for standard UART.

Applying this shared overlay to i.MX8MP might improperly enable RS485 on
&uart2, causing it to try to toggle RTS as RS485 transmit enable (breaking
hardware flow control), while leaving the actual RS485 port (&uart1)
misconfigured.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260804162310.24374-1-marex@nabladev.com?part=6