From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5B1346F48F; Wed, 5 Aug 2026 13:03:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785934991; cv=none; b=rclpKygAJ/GMZpJa5nlfDbJz60OcCfbP0R8QIfIphvHu5j1hxlObf34V2bQy1DF0T9DlVFOIanhYvZ+DThTOXc1GO0EmKaI5IDOfa0VTaVdWjwYC/a17S9rgDnOvNHv7hBKtrgNEJsZkIdxSd9/GJnbTFxcejR9BRydJYAg5GrI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785934991; c=relaxed/simple; bh=U/VelihwE9/Y5DyVuu89kZaY6Foh61jZ62a+Hvygccg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=E74hToAPo9YnfNMG6HidVbV2mTzQGfgEJaUHbtY9bAz69sFSJngynrbq+t5HtDLqbF7aX3m13zNk3+IsTiRWn6GdC+WXND5B8Ajee5ZXy2UE9PNQGFQRAiVub2JvxPixYodJyh+Xqs0htGBldu0/C7fR2beskjQeEX2pRYlCV0Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LpzPpe+C; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LpzPpe+C" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5657CC2BCFB; Wed, 5 Aug 2026 13:03:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1785934989; bh=U/VelihwE9/Y5DyVuu89kZaY6Foh61jZ62a+Hvygccg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=LpzPpe+CglNuxiT2pA5APAQP3umTEsbMMl5KOL0dAnhHgDmHgy0u5px872FsO3gY9 ejAE5kJY5R+CbefIjHM9sZpBklvujVmGnwcZlMkIrFP3a24nWguJWNQ8JDgzOJfMA/ ynbhErm7MmznT3x24isy4/GHKj4kd8Gi+TSvGwom59qYf2m9/EAUtJWVtg7j5w/oUW J0jwlaiEp88NFlKcyFXankhFNP8TNoOQoMR65wod26W97bzpOBUsjqo9cPob/WhoE/ H08LMnIKXW52/QCrL6Il3B4v3yKuY+y/d0V7tULk8FVvJjCkKWBNKQvsmlFmeiInKw IhNZODu55LCDA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45330C56205; Wed, 5 Aug 2026 13:03:09 +0000 (UTC) From: Colin Huang via B4 Relay Date: Wed, 05 Aug 2026 21:02:36 +0800 Subject: [PATCH v4 08/12] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260805-anacapa-devlop-phase-devicetree-v4-8-5d67e0efa6c5@gmail.com> References: <20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com> In-Reply-To: <20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Andy Chung X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785934963; l=3214; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=BGZCKTF8QAag1qskLE0ofPzySUEOSMb3NZgJbIMmwIo=; b=MpjikqOMq7zVXHAewpVwjarArr7otF1/OoOdZn2NtUC0MBbZ2MTzXrXKWYlc58Cq8PNSO30Fk uc7L3qxtYXqAKMDtrJBwbimeTtMwDSdYRLMzclKn5H+D1fnXnWJcYt/ X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Andy Chung Add the mctp-controller property to enable frontend NIC management via PLDM over MCTP. Also add EEPROM device for NIC FRU and reorder the I2C virtual bus index accroding to the system silkscreen index. Signed-off-by: Andy Chung --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 119 +++++++++++++++++++++ 1 file changed, 119 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index ff393ad7cdb7..703284721224 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -8,6 +8,25 @@ / { compatible = "facebook,anacapa-bmc-evt2", "aspeed,ast2600"; }; +&{/aliases} { + i2c36 = &i2c11mux0ch5; + i2c37 = &i2c11mux0ch6; + i2c38 = &i2c11mux0ch7; + i2c39 = &i2c11mux0ch0; + i2c40 = &i2c11mux0ch1; + i2c41 = &i2c11mux0ch2; + i2c42 = &i2c11mux0ch3; + i2c43 = &i2c11mux0ch4; + i2c44 = &i2c10mux0ch1; + i2c45 = &i2c10mux0ch2; + i2c46 = &i2c10mux0ch3; + i2c47 = &i2c10mux0ch4; + i2c48 = &i2c10mux0ch5; + i2c49 = &i2c10mux0ch6; + i2c50 = &i2c10mux0ch7; + i2c51 = &i2c10mux0ch0; +}; + // MB - PDB &i2c8 { i2c-mux@72 { @@ -55,6 +74,106 @@ eeprom@51 { }; }; +// R Bridge Board +&i2c10 { + multi-master; + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c10mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c10mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c10mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c10mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + +// L Bridge Board +&i2c11 { + multi-master; + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c11mux0ch0: i2c@0 { + mctp-controller; + // FE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + // MB &i2c13 { i2c-mux@70 { -- 2.34.1