From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB5F5470457; Wed, 5 Aug 2026 13:03:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785934991; cv=none; b=R079axLD63MHWHdzGK2ANC0B3H147dB4P+07p+97cc6LCTcomkrAB+EKUx29mWNe7znNclmuWTguOQk64hUSXV2Kz7a8as1eaJtW18AaogzxC0lt0Q8XZXcuV5Vj+e41LlygFF6BbEBQsIEmrHSkM4el6fUdwA4hOT0qzQIdkqs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785934991; c=relaxed/simple; bh=TvfqYkcyVz8NemCQfEvCt2KSWTiyYhcCTYK5XdDbYxQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=V62Ax7ptAhCjF8gUGQ0f+4RPyPES0G25xrnMc+e7QChGbdGgI7USm2iQUF+S+DLC1ymABJdgYRW+auwr+vOiAu4n4/QIS7KyWKKIdsowPlsezd6iw/PTzbXp57ccu2J30XQrlHxJKrd2q2iVIM2bmWn3v8sBKgU14q39YU3eyO4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Q7yZ8h2P; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Q7yZ8h2P" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6DA45C2BCFF; Wed, 5 Aug 2026 13:03:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1785934989; bh=TvfqYkcyVz8NemCQfEvCt2KSWTiyYhcCTYK5XdDbYxQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Q7yZ8h2P2ITxKAoa24C4wI5SGaKb4L1kncD6PiP9xZc9Fs88nwZw7ISE0a8dGKcYd esusn6l2cF3tCWXwumVt6vjJAEgXKT0AvfXm0uzakjkRpRc9DFl4QCfZofKcGtI7iJ u2cYFhhyEmnSw3hVeQB/aJTKZ7FbJBZX/DhCRQ59+BrlJ8xCBJX1I+ZwdTulZWhjU+ lnX8SbVvNkfxWStm3g+QlRf/H8FN/VVGobQuwu+bsZIQjyF3Iot5oUcxbfa+Sns9ki A0A7TrYYeSPJTTfnEnVOVX0U/TOjV8AqlbEqWdR3i03hwOb1XI9UKvDHl8WWOICCFh gTvmzNqz9gNyA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59786C56203; Wed, 5 Aug 2026 13:03:09 +0000 (UTC) From: Colin Huang via B4 Relay Date: Wed, 05 Aug 2026 21:02:37 +0800 Subject: [PATCH v4 09/12] ARM: dts: aspeed: anacapa: evt2: Add shunt resistor values for HSC monitors Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260805-anacapa-devlop-phase-devicetree-v4-9-5d67e0efa6c5@gmail.com> References: <20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com> In-Reply-To: <20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Peter Shen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785934963; l=2147; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=WNTfq2afBfA8+J3QozrER71+gm8MPJIV48F5xeH186s=; b=QLogMmJXmliinv4lrYX+5lFkN2Uhf9TjbCvPpr8Q7cqQCrkftYtW5bdPILzTkrAsJ4GjoaIkv 9EkQqG8ds2UCEX8WWM0UoFv4B0a6wR90PQE4Vzz7YLzQkqQ7s47RCWx X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Colin Huang Add shunt resistor configuration for LTC4287 hot-swap controllers on Anacapa EVT2 platform. The resistor values are required for accurate current and power measurement by the driver. These settings reflect the actual BOM used on EVT2, where different sense resistor values (150 uOhm and 250 uOhm) are populated across rails. Without this configuration, the reported readings would be incorrect. Signed-off-by: Peter Shen --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index 703284721224..f913fa3f622d 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -31,6 +31,26 @@ / { &i2c8 { i2c-mux@72 { i2c8mux0ch0: i2c@0 { + power-monitor@42 { + compatible = "lltc,ltc4287"; + reg = <0x42>; + shunt-resistor-micro-ohms = <150>; + }; + power-monitor@43 { + compatible = "lltc,ltc4287"; + reg = <0x43>; + shunt-resistor-micro-ohms = <150>; + }; + power-monitor@44 { + compatible = "lltc,ltc4287"; + reg = <0x44>; + shunt-resistor-micro-ohms = <250>; + }; + power-monitor@45 { + compatible = "lltc,ltc4287"; + reg = <0x45>; + shunt-resistor-micro-ohms = <250>; + }; gpio@24 { gpio-line-names = "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R", @@ -45,6 +65,21 @@ gpio@24 { }; }; i2c8mux0ch1: i2c@1 { + power-monitor@40 { + compatible = "lltc,ltc4287"; + reg = <0x40>; + shunt-resistor-micro-ohms = <150>; + }; + power-monitor@41 { + compatible = "lltc,ltc4287"; + reg = <0x41>; + shunt-resistor-micro-ohms = <150>; + }; + power-monitor@45 { + compatible = "lltc,ltc4287"; + reg = <0x45>; + shunt-resistor-micro-ohms = <250>; + }; gpio@24 { gpio-line-names = "LPDB_P50V_FAN0_R2_PG","LPDB_P50V_FAN1_R2_PG", -- 2.34.1