Re: [PATCH v2 3/4] arm64: dts: ti: k3-am62a: Set MMC clock pins as OUTPUT

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [Medium] The commit updates MMC clock pins to OUTPUT to comply with the AM62A TRM requirement (RXACTIVE=0), but only applies the fix to the SK board, missing other AM62A-based boards (such as the PHYTEC boards) which still incorrectly configure the MMC clock pins as inputs.
--

--- Patch [3]: [PATCH v2 3/4] arm64: dts: ti: k3-am62a: Set MMC clock pins as OUTPUT ---
commit a6bfe2ecc4d051fbfd71859f6e530c852974e23c
Author: Judith Mendez <jm@ti.com>

arm64: dts: ti: k3-am62a: Set MMC clock pins as OUTPUT

This commit updates the MMC clock pins on the AM62A SK board to be configured
as OUTPUT-only. This complies with the AM62A TRM requirement to have the
receiver disabled (RXACTIVE = 0) for these pins.

> diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> index 826fff38cfb77..9b120cd9b0c37 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> @@ -324,7 +324,7 @@ AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
>  	main_mmc0_pins_default: main-mmc0-default-pins {
>  		pinctrl-single,pins = <
>  			AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
> -			AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
> +			AM62AX_IOPAD(0x218, PIN_OUTPUT, 0) /* (AB1) MMC0_CLK */

[Severity: Medium]
This is a pre-existing issue, but while this commit fixes the SK board, other
AM62A-based boards (such as the PHYTEC boards) still incorrectly configure the
MMC clock pins as inputs.

For example, in arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi:
main_mmc0_pins_default():

    AM62AX_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB7) MMC0_CLK */

And in arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi:
main_mmc1_pins_default():

    AM62X_IOPAD(0x234, PIN_INPUT_PULLDOWN, 0) /* (B22) MMC1_CLK */

This leaves the receiver enabled (RXACTIVE=1) in violation of the AM62A TRM.

Should these other boards also be updated to comply with the TRM?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260805004821.416613-1-jm@ti.com?part=3