From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-186.mta1.migadu.com (mta1.migadu.com [37.59.57.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12613472789 for ; Fri, 7 Aug 2026 08:10:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=37.59.57.117 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786090249; cv=none; b=LMk7mxfTFq8aVvIj/GUOgzFYQ38NBoH5a5s+Q1Tcu5EEL9fHhspQCX7Nha5bBUkAHZ5CAOBLAamir0C/bPLUSDos9TXJmrv9Y6tq1LfcLu5CjQELboMA4BWF8HavD+SHuEpMwOAVq3y1PrY5KhrGa+AKWbPAYYkpwu074xRDzNE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786090249; c=relaxed/simple; bh=GiNZuOxap6LGtgFFcNpHCVnzuzD9zH5o9x6OSkJtZPo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DF5uziQZRQfUJwB1X6TUtV1W6u8UIqLJlQvzeeO/fWfzq8AO+pPVbnRqHYgrMlcqjWepPpeVpDj5MdyxfKAveBhhDV94U8o73iNTDwTxzfyNi1ABphRzrNBNk/eViHDQhjDoboqZ9MWmXZ8wXI/ABJ8y3gHV5iRYVQuV82dt+5c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=PShPjesM; arc=none smtp.client-ip=37.59.57.117 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="PShPjesM" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1786090242; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fFVM2WJqFCpVIsvC5XrHDqjuatPXoIjYPoUaW3vavFs=; b=PShPjesMeoO7cPyIcStLA2YbwylLfB/kamxLne8ZAxXXzM+iPPf3+tX+NZ2dbP2JP/c1M1 p69Ug6gxG1Le06AmwRImVUaiANWApxnSl+rsN8zt1RFL6vSqDV1bh1ZKV3JTkCr+C1Th9B yd825y965/KnhDpJxWIqOO6wsASKh9E= From: Atish Patra Date: Fri, 07 Aug 2026 01:09:14 -0700 Subject: [PATCH v9 19/20] tools/perf: Support event code for arch standard events Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260807-counter_delegation-v9-19-58658104e487@meta.com> References: <20260807-counter_delegation-v9-0-58658104e487@meta.com> In-Reply-To: <20260807-counter_delegation-v9-0-58658104e487@meta.com> To: Will Deacon , Atish Patra , Arnaldo Carvalho de Melo , Anup Patel , Ian Rogers , Rob Herring , Paul Walmsley , Mark Rutland , Jiri Olsa , Krzysztof Kozlowski , James Clark , Namhyung Kim Cc: linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Conor Dooley , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, devicetree@vger.kernel.org X-Migadu-Flow: FLOW_OUT From: Atish Patra RISC-V relies on the event encoding from the json file. That includes arch standard events. If event code is present, event is already updated with correct encoding. No need to update it again which results in losing the event encoding. Signed-off-by: Atish Patra Reviewed-by: Ian Rogers --- tools/perf/pmu-events/arch/riscv/arch-standard.json | 10 ++++++++++ tools/perf/pmu-events/jevents.py | 9 ++++++++- 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/tools/perf/pmu-events/arch/riscv/arch-standard.json b/tools/perf/pmu-events/arch/riscv/arch-standard.json new file mode 100644 index 000000000000..96e21f088558 --- /dev/null +++ b/tools/perf/pmu-events/arch/riscv/arch-standard.json @@ -0,0 +1,10 @@ +[ + { + "EventName": "cycles", + "BriefDescription": "cycle executed" + }, + { + "EventName": "instructions", + "BriefDescription": "instruction retired" + } +] diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 376dc2d24162..e9c6b7990880 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -413,7 +413,14 @@ class JsonEvent: self.long_desc = None if arch_std: if arch_std.lower() in _arch_std_events: - event = _arch_std_events[arch_std.lower()].event + # Inherit the arch-standard encoding only if this event defines no + # explicit encoding of its own. Events with explicit EventCode, + # ConfigCode, etc. may carry alternate encodings and appended modifiers + # that must survive. + if ('EventCode' not in jd and 'ExtSel' not in jd and + configcode is None and eventidcode is None and + legacy_hw_config is None and legacy_cache_config is None): + event = _arch_std_events[arch_std.lower()].event # Copy from the architecture standard event to self for undefined fields. for attr, value in _arch_std_events[arch_std.lower()].__dict__.items(): if hasattr(self, attr) and not getattr(self, attr): -- 2.53.0-Meta