Re: [PATCH v2 1/3] arm64: dts: qcom: ipq9574-rdp-common: Enable quad SPI mode for SPI-NAND

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Adding spi-tx-bus-width = <4> breaks SPI NAND writes because the spi-qpic-snand driver explicitly rejects Quad Program Load opcodes.
--

--- Patch [1]: [PATCH v2 1/3] arm64: dts: qcom: ipq9574-rdp-common: Enable quad SPI mode for SPI-NAND ---
commit bae8660983c8ddf15356080523eb2d131962463a
Author: Md Sadre Alam <md.alam@oss.qualcomm.com>

arm64: dts: qcom: ipq9574-rdp-common: Enable quad SPI mode for SPI-NAND

This commit sets the SPI-NAND device node to use 4-bit transmit and receive
bus widths. This allows the controller and flash to use quad mode instead of
single-bit transfers.

> diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
> --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
[ ... ]
> @@ -249,6 +249,8 @@ flash@0 {
>  		nand-ecc-engine = <&qpic_nand>;
>  		nand-ecc-strength = <4>;
>  		nand-ecc-step-size = <512>;
> +		spi-rx-bus-width = <4>;
> +		spi-tx-bus-width = <4>;

[Severity: High]
Does enabling a 4-bit transmit bus width break SPI NAND writes on this board?

When spi-tx-bus-width is set to 4, the spi-nand core will probe for Quad
Program Load operations (e.g., opcode 0x32) and select it as the default page
write operation.

However, the spi-qpic-snand driver only appears to support single-bit program
load opcodes:

drivers/spi/spi-qpic-snand.c:qcom_spi_cmd_mapping() {
	...
	case SPINAND_PROGRAM_LOAD:
		*cmd = SPINAND_PROGRAM_LOAD;
		break;
	default:
		dev_err(snandc->dev, "Opcode not supported: %u\n", opcode);
		return -EOPNOTSUPP;
}

Because the driver rejects the Quad Program Load opcodes, writes will fail
with -EOPNOTSUPP.

Additionally, even if the mapping were updated, it looks like the driver
ignores the data buffer for any opcode other than SPINAND_PROGRAM_LOAD:

drivers/spi/spi-qpic-snand.c:qcom_spi_write_page() {
	...
	if (op->cmd.opcode == SPINAND_PROGRAM_LOAD)
		snandc->qspi->data_buf = (u8 *)op->data.buf.out;
	...
}

Should the spi-tx-bus-width addition be omitted until the spi-qpic-snand
driver is updated to support Quad Program Load operations?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260807-quad_dts-v2-0-6f578d4152b7@oss.qualcomm.com?part=1