From: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
To: Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Srinivas Kandagatla <srini@kernel.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>
Cc: linux-arm-msm@vger.kernel.org, linux-sound@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>,
Sashiko <sashiko-bot@kernel.org>
Subject: [PATCH v1 2/5] ASoC: qcom: q6prm: Fix QAIF clock ID typo
Date: Sat, 8 Aug 2026 23:49:45 +0530 [thread overview]
Message-ID: <20260808181948.2489187-3-prasad.kumpatla@oss.qualcomm.com> (raw)
In-Reply-To: <20260808181948.2489187-1-prasad.kumpatla@oss.qualcomm.com>
The Audio IF QAIF clock IDs were introduced with a "LAPSS"
prefix instead of "LPASS".
Rename the definitions and update their users accordingly.
This also fixes the clock names generated by Q6PRM_CLK().
Reported-by: Sashiko <sashiko-bot@kernel.org>
Link: https://sashiko.dev/#/patchset/20260804070307.117119-1-prasad.kumpatla@oss.qualcomm.com
Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
sound/soc/qcom/qdsp6/q6prm-clocks.c | 56 ++++++++++++++---------------
sound/soc/qcom/qdsp6/q6prm.h | 56 ++++++++++++++---------------
2 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/sound/soc/qcom/qdsp6/q6prm-clocks.c b/sound/soc/qcom/qdsp6/q6prm-clocks.c
index f613e2aee75e..b4f9abbe02cb 100644
--- a/sound/soc/qcom/qdsp6/q6prm-clocks.c
+++ b/sound/soc/qcom/qdsp6/q6prm-clocks.c
@@ -64,34 +64,34 @@ static const struct q6dsp_clk_init q6prm_clks[] = {
Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_MCLK),
Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK),
Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF0_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF0_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF1_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF1_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF2_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF2_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF3_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF3_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF4_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF4_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF5_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF5_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF6_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF6_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF7_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF7_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF8_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF8_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF9_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF9_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF10_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF10_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF11_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF11_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF12_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_QAIF_IF12_EBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_VA_QAIF_IF0_IBIT),
- Q6PRM_CLK(LAPSS_CLK_ID_VA_QAIF_IF0_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF0_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF0_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF1_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF1_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF2_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF2_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF3_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF3_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF4_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF4_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF5_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF5_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF6_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF6_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF7_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF7_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF8_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF8_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF9_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF9_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF10_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF10_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF11_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF11_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF12_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_QAIF_IF12_EBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_VA_QAIF_IF0_IBIT),
+ Q6PRM_CLK(LPASS_CLK_ID_VA_QAIF_IF0_EBIT),
Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE, Q6PRM_HW_CORE_ID_LPASS,
"LPASS_HW_MACRO"),
Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE, Q6PRM_HW_CORE_ID_DCODEC,
diff --git a/sound/soc/qcom/qdsp6/q6prm.h b/sound/soc/qcom/qdsp6/q6prm.h
index cca77cd92bc1..cf619ef6561a 100644
--- a/sound/soc/qcom/qdsp6/q6prm.h
+++ b/sound/soc/qcom/qdsp6/q6prm.h
@@ -97,34 +97,34 @@
/* Clock ID for RX CORE MCLK2 2X MCLK */
#define Q6PRM_LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK 0x318
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF0_IBIT 0x500
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF0_EBIT 0x501
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF1_IBIT 0x502
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF1_EBIT 0x503
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF2_IBIT 0x504
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF2_EBIT 0x505
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF3_IBIT 0x506
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF3_EBIT 0x507
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF4_IBIT 0x508
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF4_EBIT 0x509
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF5_IBIT 0x50A
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF5_EBIT 0x50B
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF6_IBIT 0x50C
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF6_EBIT 0x50D
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF7_IBIT 0x50E
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF7_EBIT 0x50F
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF8_IBIT 0x510
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF8_EBIT 0x511
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF9_IBIT 0x512
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF9_EBIT 0x513
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF10_IBIT 0x514
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF10_EBIT 0x515
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF11_IBIT 0x516
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF11_EBIT 0x517
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF12_IBIT 0x518
-#define Q6PRM_LAPSS_CLK_ID_QAIF_IF12_EBIT 0x519
-#define Q6PRM_LAPSS_CLK_ID_VA_QAIF_IF0_IBIT 0x550
-#define Q6PRM_LAPSS_CLK_ID_VA_QAIF_IF0_EBIT 0x551
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF0_IBIT 0x500
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF0_EBIT 0x501
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF1_IBIT 0x502
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF1_EBIT 0x503
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF2_IBIT 0x504
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF2_EBIT 0x505
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF3_IBIT 0x506
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF3_EBIT 0x507
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF4_IBIT 0x508
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF4_EBIT 0x509
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF5_IBIT 0x50A
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF5_EBIT 0x50B
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF6_IBIT 0x50C
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF6_EBIT 0x50D
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF7_IBIT 0x50E
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF7_EBIT 0x50F
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF8_IBIT 0x510
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF8_EBIT 0x511
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF9_IBIT 0x512
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF9_EBIT 0x513
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF10_IBIT 0x514
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF10_EBIT 0x515
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF11_IBIT 0x516
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF11_EBIT 0x517
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF12_IBIT 0x518
+#define Q6PRM_LPASS_CLK_ID_QAIF_IF12_EBIT 0x519
+#define Q6PRM_LPASS_CLK_ID_VA_QAIF_IF0_IBIT 0x550
+#define Q6PRM_LPASS_CLK_ID_VA_QAIF_IF0_EBIT 0x551
#define Q6PRM_LPASS_CLK_SRC_INTERNAL 1
#define Q6PRM_LPASS_CLK_ROOT_DEFAULT 0
--
2.34.1
next prev parent reply other threads:[~2026-08-08 18:20 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-08 18:19 [PATCH v1 0/5] ASoC: qcom: Fix AudioReach TDM review findings Prasad Kumpatla
2026-08-08 18:19 ` [PATCH v1 1/5] dt-bindings: sound: qcom,q6dsp-lpass-ports: Rename QAIF clock IDs Prasad Kumpatla
2026-08-08 18:45 ` sashiko-bot
2026-08-09 12:25 ` Prasad Kumpatla
2026-08-08 18:19 ` Prasad Kumpatla [this message]
2026-08-08 18:45 ` [PATCH v1 2/5] ASoC: qcom: q6prm: Fix QAIF clock ID typo sashiko-bot
2026-08-09 12:27 ` Prasad Kumpatla
2026-08-08 18:19 ` [PATCH v1 3/5] ASoC: qcom: qdsp6: Zero-initialize AudioReach module config Prasad Kumpatla
2026-08-08 18:46 ` sashiko-bot
2026-08-09 12:30 ` Prasad Kumpatla
2026-08-08 18:19 ` [PATCH v1 4/5] ASoC: qcom: common: Distinguish missing and invalid TDM slot configuration Prasad Kumpatla
2026-08-08 18:39 ` sashiko-bot
2026-08-09 12:32 ` Prasad Kumpatla
2026-08-08 18:19 ` [PATCH v1 5/5] ASoC: qcom: sc8280xp: Fix TDM hw_params error handling Prasad Kumpatla
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