Re: [PATCH v3 5/8] dt-bindings: reset: Add reset controller constants for mt8167

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing `#reset-cells` in the `required` list for the MT8167 watchdog and MMSYS bindings.
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--- Patch [5]: [PATCH v3 5/8] dt-bindings: reset: Add reset controller constants for mt8167 ---
commit 226fd0fca4b3ef6d17665690b5633d8884780bcb
Author: Luca Leonardo Scorcia <l.scorcia@gmail.com>

dt-bindings: reset: Add reset controller constants for mt8167

This commit adds reset ID constants for the MT8167 watchdog (TOPRGU)
and MMSYS devices.

> diff --git a/include/dt-bindings/reset/mediatek,mt8167-resets.h b/include/dt-bindings/reset/mediatek,mt8167-resets.h
> new file mode 100644
> index 0000000000000..af8a3e499f8b6
> --- /dev/null
> +++ b/include/dt-bindings/reset/mediatek,mt8167-resets.h
> @@ -0,0 +1,53 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8167
> +#define _DT_BINDINGS_RESET_CONTROLLER_MT8167
> +
> +/* TOPRGU resets, these are actual bits in the register */
> +#define MT8167_TOPRGU_DDRPHY_FLASH_RST		0
[ ... ]
> +#define MT8167_TOPRGU_SW_RST_NUM		15
> +
> +/* MMSYS resets, these are IDs */
> +#define MT8167_MMSYS_SW0_RST_B_SMI_COMMON	0
[ ... ]
> +#define MT8167_MMSYS_SW1_RST_B_HDMI		27
> +
> +#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8167 */

[Severity: Medium]
Since this header adds reset provider capabilities for the MT8167 watchdog
and MMSYS, shouldn't the corresponding YAML schemas also be updated?

When a hardware variant gains reset capabilities, the #reset-cells property
typically needs to be added to the required list in the schema. Without
updates to mediatek,mtk-wdt.yaml and mediatek,mmsys.yaml to conditionally
require #reset-cells for mediatek,mt8167-wdt and mediatek,mt8167-mmsys,
incomplete device tree nodes will silently pass dt_binding_check validation.

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Sashiko AI review · https://sashiko.dev/#/patchset/20260809160643.33991-1-l.scorcia@gmail.com?part=5