From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from MRWPR03CU001.outbound.protection.outlook.com (mail-francesouthazon11021138.outbound.protection.outlook.com [40.107.130.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E87EB3A0E93; Mon, 10 Aug 2026 07:12:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.130.138 ARC-Seal:i=4; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786345942; cv=fail; b=doJe4BTUg/DxewFqMFHA3ojy92HzVm74XV5p/v95ErfMia0uW+ChcdAm/MKQsdDYezYjI/fTpy++CPFkvgdnZ9oSqXNwEwy5MFzGPWldX5Cg29dQbIpMjZpROFE6lqOJCLPbuRmwGkHjx17h8fqyaYtqP3sURrkqX5F+e7lALUw= ARC-Message-Signature:i=4; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786345942; c=relaxed/simple; bh=SoiXnWfyiighggdq6JUjLTktn+6tRY/5BRLR78q6msE=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=GvuvJOZSaR6OT8FhfipfAw3GSO6u/oIcW4M2eSYrwYUAAp7OHpoGjkQIBQ8RSZ/qzZV6j09fAW8tP0fKGMTVCr/yA8et7F8eiZeg0gxav9/2lqwl0vNlvw7Zt95MyQD4oV4Me6s8jVQmZnUMGDkSP/qn+J6px2fP2NIaqe9SWRA= ARC-Authentication-Results:i=4; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=solid-run.com; spf=pass smtp.mailfrom=solid-run.com; dkim=pass (2048-bit key) header.d=solid-run.com header.i=@solid-run.com header.b=MN4dkCKy; dkim=pass (2048-bit key) header.d=solid-run.com header.i=@solid-run.com header.b=MN4dkCKy; arc=fail smtp.client-ip=40.107.130.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=solid-run.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=solid-run.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=solid-run.com header.i=@solid-run.com header.b="MN4dkCKy"; dkim=pass (2048-bit key) header.d=solid-run.com header.i=@solid-run.com header.b="MN4dkCKy" ARC-Seal: i=3; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=pass; b=uOFeoPhI2oczZy8ip9ZG/PmnE3SG2K8TJaGdm6uTKloO0MJfuJwVemujXKw4xbO0q+fb97t+h8ZflFtLZ9tiBMep3T/15aDMGFdGcwo0g2zm6aNJzoq4c1Sq1XC+OhsjWWgiBRiOG/kXGda6ykKPxNBvXORH4Rorb29sYR7yz/yqVqAgmMBc4a/gi0Ja04JS2RowqKmZYMUoJFjtM5oKJyPfKUuVBibVdI6McZVV+fFM7mY+4TxYFGNFIfs5Pn3mkC14dyKruOQeDklE8XF2KR2HzBDaRbGksZ9aaYNMzDQ4wGGcjHzPk8UlZntGfn4nZBgw2kUNPL5Am8EXQSgksA== ARC-Message-Signature: i=3; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=J6MbLbJXywwCAUVAj1j3zo4EKls97i+yv2X3IvOndqI=; b=dmBFFHT3YhJKjLcsEBIuZ4P6H0VUl7gW5BhGoJOoTPX7bYT25x7aX2noSF436+xJNrtLst2ynsuvjDZmgArOV+x/UrZao2mxYDHRlHEZZLKBQRPZmyHM3pFD2kjWR+NBEfJ6CWX6Bx9gZtRQOGYKfDAtpNPdpp4WCzOGWWyI1HCI+wcRghRyHB2raPJOWUkCZUXCPU1L/gh5j+QpkR/G9CNKrLix1z1gBFvTucZ24JE2VyuF11QOUCfGddI1dkuAXHNEjDQmQA/QQo4y7vNfCU44I7JVgXAUAmdnNXCT2YBqRTydV+9HgYvJtUvfCkL9RbtKMILcwczc+UilTaAwKA== ARC-Authentication-Results: i=3; mx.microsoft.com 1; spf=fail (sender ip is 52.17.62.50) smtp.rcpttodomain=glider.be smtp.mailfrom=solid-run.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=solid-run.com; dkim=pass (signature was verified) header.d=solid-run.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=solid-run.com] dkim=[1,1,header.d=solid-run.com] dmarc=[1,1,header.from=solid-run.com]) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=solid-run.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=J6MbLbJXywwCAUVAj1j3zo4EKls97i+yv2X3IvOndqI=; b=MN4dkCKy46rdqthTzh8IYsGFHm6/mAARf4yjKU0R2e123yGWe7QZJ3DINcJ9dQr2KAzMwNXq5xkhQQug2MWRmr+1iplGw6QOBYS7VbeBpmtsdT0wyJxyT+ZKGQygwXRYJsWlAnE0Z4zgmYlw5xpbdag95UwUvBSqWKbRU4n0xncJKKNbW1CaqVqmOv0ni8ygfI4nf7Qjxconoz49lGkBDqWlbNPqjdJIpCKbFdiqTdOFf3hK0JX4+M/JVAIkO5ybkTlr+C0hCQlb/0O3QDKKxUgYi0kOdURbeiEtD0fwuRpgMdiphEO8FMUFAyFDkleQW9xqLy0lQsKzbtx+WO0t+A== Received: from DU2PR04CA0075.eurprd04.prod.outlook.com (2603:10a6:10:232::20) by DBAPR04MB7207.eurprd04.prod.outlook.com (2603:10a6:10:1b2::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.292.25; Mon, 10 Aug 2026 07:12:14 +0000 Received: from DB1PEPF00039232.eurprd03.prod.outlook.com (2603:10a6:10:232:cafe::26) by DU2PR04CA0075.outlook.office365.com (2603:10a6:10:232::20) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.292.25 via Frontend Transport; Mon, 10 Aug 2026 07:12:14 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 52.17.62.50) smtp.mailfrom=solid-run.com; dkim=pass (signature was verified) header.d=solid-run.com;dmarc=pass action=none header.from=solid-run.com; Received-SPF: Fail (protection.outlook.com: domain of solid-run.com does not designate 52.17.62.50 as permitted sender) receiver=protection.outlook.com; client-ip=52.17.62.50; helo=eu-dlp.cloud-sec-av.com; Received: from eu-dlp.cloud-sec-av.com (52.17.62.50) by DB1PEPF00039232.mail.protection.outlook.com (10.167.8.105) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.315.6 via Frontend Transport; Mon, 10 Aug 2026 07:12:14 +0000 Received: from emails-7456666-12-mt-prod-cp-eu-2.checkpointcloudsec.com (ip-10-20-5-157.eu-west-1.compute.internal [10.20.5.157]) by mta-outgoing-dlp-814-mt-prod-cp-eu-2.checkpointcloudsec.com (Postfix) with ESMTPS id A19CF7EC67; Mon, 10 Aug 2026 07:12:14 +0000 (UTC) X-Mailbox-Line: From b'josua@solid-run.com' Mon Aug 10 07:12:08 2026 ARC-Seal: i=2; cv=pass; a=rsa-sha256; d=checkpointcloudsec.com; s=arcselector01; t=1786345934; b=c401Sw+dbIpLPbpwMlLTDQHfvsxD7w2SWPC0FlUq3maw9r/kTMNCOsNWc4aXgWzJAcZs2 Wmk8I1rWORFczZIYqu/mmkIEQNih0ng/pJbscfZPu3Y+UYAOn+IfJfhPMR6aNMQK1JEy7C2 AebyaceycI3RTI2XllZISOI+jrxe918= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=checkpointcloudsec.com; s=arcselector01; t=1786345934; h=from : to : subject : date : message-id : content-type : mime-version; bh=J6MbLbJXywwCAUVAj1j3zo4EKls97i+yv2X3IvOndqI=; b=pISQWCRbfoGL26/yzrxo8atArvya2IzER4zEpdITXRNEqUJ86lmqW9rCPcx/sO24aAkWV 8vzW0trtbpz7Z+OxmYEeLeo4X4offew/fbR8VT6d91nkGRa/mhVOrYZ5b0xL6zHa27Q94A2 8KlP0pbVXBMJDfMd/tJdLly1tyZ6pjc= ARC-Authentication-Results: i=2; mx.checkpointcloudsec.com; arc=pass; dkim=none header.d=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=solid-run.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=J6MbLbJXywwCAUVAj1j3zo4EKls97i+yv2X3IvOndqI=; b=MN4dkCKy46rdqthTzh8IYsGFHm6/mAARf4yjKU0R2e123yGWe7QZJ3DINcJ9dQr2KAzMwNXq5xkhQQug2MWRmr+1iplGw6QOBYS7VbeBpmtsdT0wyJxyT+ZKGQygwXRYJsWlAnE0Z4zgmYlw5xpbdag95UwUvBSqWKbRU4n0xncJKKNbW1CaqVqmOv0ni8ygfI4nf7Qjxconoz49lGkBDqWlbNPqjdJIpCKbFdiqTdOFf3hK0JX4+M/JVAIkO5ybkTlr+C0hCQlb/0O3QDKKxUgYi0kOdURbeiEtD0fwuRpgMdiphEO8FMUFAyFDkleQW9xqLy0lQsKzbtx+WO0t+A== Authentication-Results-Original: mx.checkpointcloudsec.com; arc=pass; dkim=none header.d=none Received: from VI1PR04MB5807.eurprd04.prod.outlook.com (2603:10a6:803:ec::21) by PA4PR04MB9688.eurprd04.prod.outlook.com (2603:10a6:102:271::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.292.25; Mon, 10 Aug 2026 07:12:03 +0000 Received: from VI1PR04MB5807.eurprd04.prod.outlook.com ([fe80::3da4:2827:d637:37de]) by VI1PR04MB5807.eurprd04.prod.outlook.com ([fe80::3da4:2827:d637:37de%2]) with mapi id 15.21.0292.024; Mon, 10 Aug 2026 07:12:03 +0000 From: Josua Mayer Date: Mon, 10 Aug 2026 10:11:52 +0300 Subject: [PATCH v6 3/5] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260810-rzg2-sr-boards-v6-3-41faa32cdafb@solid-run.com> References: <20260810-rzg2-sr-boards-v6-0-41faa32cdafb@solid-run.com> In-Reply-To: <20260810-rzg2-sr-boards-v6-0-41faa32cdafb@solid-run.com> To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Benjamin Bara Cc: Josua Mayer , Jon Nettleton , Mikhail Anikin , Yazan Shhady , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org X-Mailer: b4 0.15.2 X-ClientProxiedBy: TL2P290CA0013.ISRP290.PROD.OUTLOOK.COM (2603:1096:950:2::7) To VI1PR04MB5807.eurprd04.prod.outlook.com (2603:10a6:803:ec::21) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-TrafficTypeDiagnostic: VI1PR04MB5807:EE_|PA4PR04MB9688:EE_|DB1PEPF00039232:EE_|DBAPR04MB7207:EE_ X-MS-Office365-Filtering-Correlation-Id: 42298ed8-82d7-413e-d145-08def6aeb497 X-CLOUD-SEC-AV-Info: solidrun,office365_emails,sent,inline X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0;ARA:13230040|366016|1800799024|7416014|52116014|376014|23010399003|10067099003|56012099006|6133799003|3023799007|22082099003|18002099003|38350700014; X-Microsoft-Antispam-Message-Info-Original: lmgk37RWR6fTBMi9m476Uo1hbzSIDHiseb/MS71FRikI9C3PM/rsq2N9DVEUqdqyLEMyvO63BSoVJmDo9BaWVhnj8fhuYE8DCEZlv9+L+r8E+eOhjBQ21C+g/LHJ+2Oj3aVX2OJF8Ss+2F7ZKQTWO7gki5clz2GKRJpwgVLW6mzqOTYTkcr2M1K+pd89GKPcEEkhgNhTEzvusdiZCQwT+AO7zqykqkjUzxTi+Ix5RRIauCsm/xRkJTQ4k+FDoQD7dB7kBGtzwoUwq4dmH2SdI7lag5eZd4tbs9mseNJwlLsudoP/N15readPvYwPmSimBURuI5nQQuzDg+oO+sBqvIL8SoSZq5oC41w0jbvPgdWhgWsqzmsFgfK7Ehd9wd9mZhsbUq87cVdNvMYhG/J+gJnjaaIW7wWkoiXt68WFqV9rugc4X14c4hRa5hG9gaHTNIVIkhsdBg59S1cFbKUorkw1fUVmGD8z6doUtmKhlU0tA30SYZymfBrbmCb3mwHx9/TEs1cJEQUW4H4Vfg+KuKS3rRy4sWwohzh2UZRfFoBzBC5nY76+xbsE7A1KDH/rvf5W30n3/p6lmW4xjBigdN3vtjDn00VlfOiD6qBEX7h35UQJbOwBCLKPLh6KMK2407W5a/679hgePEYq4l5Evbot2iPFG0hp4DcXuyMa/Q3yV6gOnkBKbBb84joKXDmLjqi9Xs77/g+SHg2fa1C/88W5RDrhMtcw2EHDUT/3Xlo= X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR04MB5807.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(7416014)(52116014)(376014)(23010399003)(10067099003)(56012099006)(6133799003)(3023799007)(22082099003)(18002099003)(38350700014);DIR:OUT;SFP:1102; X-Exchange-RoutingPolicyChecked: jfyAXyrBsEYs6zphtaA/VKbjrMe8W15/Oo8FXjdRYbHDD7Qxlp5rREV+P0sZHgaJwtCNXvyANtOhgG0YS+wpi5Xwi/juVosQzqMwMhNyrFjG1LNuvlxy1Umk2iEmhIR8TD4euaOhkd0cbtJNtGg+ZGWLSP0tuer/Zb3owjd0vqbEDYHcsM174tmzCKEusMAtQ7+8GnFs2bcLhO2gllssnpP7yVvtI+J/EXtRlv9MX/mBlhckEM5UOdYZcWJjqrlPeOJMYuM9F4wRJrITAw6nJPJsB7rA3urUtADPwAKsfvMlAhfR2h1CdfWLNNG7W8EAK711uj+CqIU87ZS7zh5aJQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR04MB9688 X-CLOUD-SEC-AV-INT-Relay: sent X-CLOUD-SEC-AV-UUID: debc69b34b014faca5b5aa3faf5dbf76:solidrun,office365_emails,sent,inline:296e93809dba7f6842e6e1e7503db0b0 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=prRCrYCgE/GpRRoRaWIfjjJmpGPQBjA41viO0AERI9PbXye/bZ7uKSpTKh7l4arI/moCtlluuIFdKyfAmo/KHBB0GSiLqYhG9irtFCnvmgZmuw88t4s9QjVp+5qJ7Rj7FHtJVpxaIlEgzNDKUZmIwJCZ1O6S3XQ7uu3n2dUX+YGb0FH+yqkyS+1qfQ140u7lB9/n6S7g2S1EDZC3e8Tz5hE8noC4TYjtTu8k6R+/yqCRP4tE7Uzhp5dPIpkIxsmXksN1hQa8whvVEEtRhJof7C7VdqD2nSsyvISbkSOASUeN8hYgWp6Vch8ykS21unAIT1U0HUAepZw+XMp4qEDonA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=J6MbLbJXywwCAUVAj1j3zo4EKls97i+yv2X3IvOndqI=; b=bc+4056Ci2qd+LlC2oyaGvgOS8BI4BziN8Mrn3tkuZIna0G7ILJ0gFfYW/NMRW/FR1vfTMU9W93lrhNpl82uZ4+mUwQHyvF36IlZHCU69jdzSwv+TNmWNoaPWoeXzFUReZMHNXISeSi2M7txsRKbyS6LPfKJTZWu7vzZDfIjaxVLwjHcdAgP7/jQghN3K6cxFqVdv77bRgzhzajARu0f/jOsdysen0azxwK24T1lxVWZqRSJMMWc4VxncAB/vZTOT0Di1/oNfB6Vi9YhP2yCtERuUsdnad0gWQ4tIXp+4Afxp1MJfXZh9DEc2lrLiaWdn9CnJm/KcmIGE43QLhb42Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=solid-run.com; dmarc=pass action=none header.from=solid-run.com; dkim=pass header.d=solid-run.com; arc=none X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DB1PEPF00039232.eurprd03.prod.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 291311ce-29ea-4342-ddd8-08def6aead89 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|82310400026|14060799003|35042699022|1800799024|7416014|36860700016|376014|10067099003|56012099006|3023799007|6133799003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: 6QPyoeT00SnxpWvgw5jcr/dwBIU7PgrlWth8L3d7uc6fXR/5x3Gy95s1RU6bt9dxGPkukS8xJPNPFd3IeceXOTU6XkNeIeVrEDj/F35MjCqVmhsfl1uHVL01KtHWvgR2LvA/SZ8ubTXW1gjP62GupgcpVkw/onPkpmPxHw3ytkKOPjKROXPlhPg2V+h33NE1jLIV3I9pekODeQY84KjDGRHKLZzxD8XbpJ0hb0wKtUSrv/efkW0sF7zQsy3kl0ZyIPrOCrGrDNCZvKyT9MUrI16vi8Fn8RSUJxE7VpbKvmp0a5wpqTzykkxA+hYBaxzzQE9O4gpiCItEkSWT1AGP5TuPK67qs4tcUuNCDJ0K3Ehnk2bWJCrBEZZM7+bFwaS8RHPA5OcqwXLBQMzk37OisMiYlEH1fRZttj92G97DTqHXmaXhWKjUHSIkGUM55n+88IfMZ4OC8w8Gh4GLBnMTLmIxDlIgkk/nN9qEIMSn9xLm3zqLFKtwq21ATzTXxFabJn4qL7vq/Le+tnYIZ9tS2+7cznB4LqGKGI6TjCvPl7fqAFHXtSuor5SVGa5MKrTUBW+Mps1Nd407ko8aIk49p06t16xuebxp/N9JswBbRrv428icvzQEFmvUOHGPJPNTsv3CxhojKIJ3UrExuewT8NiiPtPuRKGzR7b7N4pAyWswO5pGMKqgXsgDttoVmL+4oOGKfNHhQHOZQyv/w7VAMQ== X-Forefront-Antispam-Report: CIP:52.17.62.50;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:eu-dlp.cloud-sec-av.com;PTR:eu-dlp.cloud-sec-av.com;CAT:NONE;SFS:(13230040)(23010399003)(82310400026)(14060799003)(35042699022)(1800799024)(7416014)(36860700016)(376014)(10067099003)(56012099006)(3023799007)(6133799003)(18002099003)(22082099003);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: AjOfB1xBR4ZoQiR1XQlQwK4AE5NKHdkkDRbEYPhusbX0S70K9887vUflp1d8svcBTtFEGKXt1KF3RZReum3mRle1eHQPzq8Zajrxr0jh+mQdCPE9w/btSUcE9CUiSK7Azwx1RhswuSRz/+eKv2dOwDWzPRQjh7mSh8dtEkOL6SzwbBY7NoVP90Cxiu+lem+Pfo//fcFH+FfuCyfVkRjxdMlEa7MhfMkgnIJRgoBZI8pQ025MSmL5nESWBZW6GVBL8v6ML340CXHycX1qSOsiKhzmO2Q7Szo4vklPRYlf32Jx+q0hYublIucMF5Gc2DAEruSPyPvV1WDjEU5ee/Z6K46iT6Rm7aOTql1/SwiYNpAphkQcjQ8Jx3I7KSVd3cGJoJ2zoQ8vdhpmiuNMUQdJkkYR18EZBzjWwntayzaqqSBdckSbhYRQ0TJcefRKfo9d X-OriginatorOrg: solid-run.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2026 07:12:14.7212 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 42298ed8-82d7-413e-d145-08def6aeb497 X-MS-Exchange-CrossTenant-Id: a4a8aaf3-fd27-4e27-add2-604707ce5b82 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=a4a8aaf3-fd27-4e27-add2-604707ce5b82;Ip=[52.17.62.50];Helo=[eu-dlp.cloud-sec-av.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF00039232.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR04MB7207 Add support for the SolidRun RZ/G2L SoM [1] on Hummingboard IIoT [2]. The SoM features: - 2x 1Gbps Ethernet with PHY - eMMC - 1/2GB DDR - WiFi + Bluetooth - SDHI Mux switching between eMMC and Carrier Board The HummingBoard IIoT features: - 3x USB-2.0 Type A connector - 2x 1Gbps RJ45 Ethernet - USB Type-C Console Port - microSD connector - RTC with backup battery - RGB Status LED - 1x M.2 B-Key connector with USB-2.0 + SIM card holder - 1x DSI Display Connector - GPIO header - 2x RS232/RS485 ports (configurable) - 2x CAN Descriptions for eMMC, microSD and RS485 are provided as overlays due to their dependency on configurable mux states. [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/ [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/ Signed-off-by: Josua Mayer --- arch/arm64/boot/dts/renesas/Makefile | 13 + .../dts/renesas/r9a07g044l2-hummingboard-iiot.dts | 16 + .../renesas/rzg2l-hummingboard-iiot-common.dtsi | 560 +++++++++++++++++++++ .../renesas/rzg2l-hummingboard-iiot-microsd.dtso | 26 + .../renesas/rzg2l-hummingboard-iiot-rs485-a.dtso | 17 + .../renesas/rzg2l-hummingboard-iiot-rs485-b.dtso | 17 + .../boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi | 49 ++ arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso | 44 ++ arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi | 451 +++++++++++++++++ 9 files changed, 1193 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 8bf155badd11..e2af196e18bf 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -170,6 +170,19 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtbo r9a07g044c2-smarc-cru-csi-ov5645-dtbs := r9a07g044c2-smarc.dtb r9a07g044c2-smarc-cru-csi-ov5645.dtbo dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc-cru-csi-ov5645.dtb +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot.dtb +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-sr-som-emmc.dtbo +r9a07g044l2-hummingboard-iiot-emmc-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-sr-som-emmc.dtbo +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-emmc.dtb +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-microsd.dtbo +r9a07g044l2-hummingboard-iiot-microsd-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-microsd.dtbo +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-microsd.dtb +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-rs485-a.dtbo +r9a07g044l2-hummingboard-iiot-rs485-a-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-a.dtbo +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-rs485-a.dtb +dtb-$(CONFIG_ARCH_R9A07G044) += rzg2l-hummingboard-iiot-rs485-b.dtbo +r9a07g044l2-hummingboard-iiot-rs485-b-dtbs := r9a07g044l2-hummingboard-iiot.dtb rzg2l-hummingboard-iiot-rs485-b.dtbo +dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-hummingboard-iiot-rs485-b.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-remi-pi.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc-cru-csi-ov5645.dtbo diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-iiot.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-iiot.dts new file mode 100644 index 000000000000..eba4f423c8f0 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a07g044l2-hummingboard-iiot.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2025 Josua Mayer + */ + +/dts-v1/; + +#include "r9a07g044l2.dtsi" +#include "rzg2l-sr-som.dtsi" +#include "rzg2l-hummingboard-iiot.dtsi" + +/ { + compatible = "solidrun,rzg2l-hummingboard-iiot", "solidrun,rzg2l-sr-som", + "renesas,r9a07g044l2", "renesas,r9a07g044"; + model = "SolidRun RZ/G2L HummingBoard IIoT"; +}; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi new file mode 100644 index 000000000000..eaec4cca7694 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi @@ -0,0 +1,560 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2025 Josua Mayer + */ + +#include +#include +/ { + /* power for M.2 B-Key connector (J6) */ + regulator-m2-b { + compatible = "regulator-fixed"; + regulator-name = "m2-b"; + gpios = <&tca6416_u20 5 GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + enable-active-high; + }; + + /* power for M.2 M-Key connector (J4) */ + regulator-m2-m { + compatible = "regulator-fixed"; + regulator-name = "m2-m"; + gpios = <&tca6416_u20 6 GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + enable-active-high; + }; + + /* power for USB-A J27 behind USB Hub Port 3 */ + regulator-vbus-2 { + compatible = "regulator-fixed"; + regulator-name = "vbus2"; + regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + gpios = <&tca6416_u20 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + /* power for USB-A J27 behind USB Hub Port 4 */ + regulator-vbus-3 { + compatible = "regulator-fixed"; + regulator-name = "vbus3"; + regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + gpios = <&tca6416_u20 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + aliases { + gpio1 = &tca6408_u48; + gpio2 = &tca6408_u37; + gpio3 = &tca6416_u20; + gpio4 = &tca6416_u21; + i2c3 = &i2c_exp; + i2c4 = &i2c_csi; + i2c5 = &i2c_dsi; + i2c6 = &i2c_lvds; + rtc0 = &carrier_rtc; + rtc1 = &pmic; + serial3 = &scif3; + }; + + gpio-keys { + compatible = "gpio-keys"; + + wakeup-event { + interrupts-extended = <&tca6416_u21 11 IRQ_TYPE_EDGE_FALLING>; + label = "m2-m-wakeup"; + wakeup-source; + linux,code = ; + }; + }; + + can_mux: mux-controller-1 { + compatible = "gpio-mux"; + /* default J9-55/57/59/61 to on-board transceivers */ + idle-state = <0>; + #mux-control-cells = <0>; + /* + * Mux routes CAN bus signals between SoM connector pins, + * expansion connector (J22) and on-board transceivers using + * two GPIO: + * - IO3: 0 = on-board transceivers, 1 = expansion connector + * - IO4: 0 = J9-55/57/59/61, 1 = J7-12/16 & J9-54/56 + */ + mux-gpios = <&tca6416_u20 3 GPIO_ACTIVE_HIGH>, + <&tca6416_u20 4 GPIO_ACTIVE_HIGH>; + }; + + spi_mux: mux-controller-2 { + compatible = "gpio-mux"; + /* default on-board */ + idle-state = <0>; + /* + * Mux switches spi bus between on-board tpm + * and expansion connector (J22). + */ + mux-gpios = <&tca6416_u21 0 GPIO_ACTIVE_HIGH>; + #mux-control-cells = <0>; + }; + + scif1_scif3_b2b_mux: mux-controller-3 { + compatible = "gpio-mux"; + /* default on-board */ + idle-state = <0>; + #mux-control-cells = <0>; + /* + * Mux switches both scif1 and scif3 tx/rx between expansion + * connector (J22) and on-board rs232/rs485 transceivers + * using one GPIO: 0 = on-board, 1 = connector. + */ + mux-gpios = <&tca6416_u20 0 GPIO_ACTIVE_HIGH>; + }; + + scif1_rs_232_485_mux: mux-controller-4 { + compatible = "gpio-mux"; + /* default rs232 */ + idle-state = <0>; + #mux-control-cells = <0>; + /* + * Mux switches scif1 tx/rx between rs232 and rs485 + * transceivers. using one GPIO: 0 = rs232, 1 = rs485. + */ + mux-gpios = <&tca6416_u20 1 GPIO_ACTIVE_HIGH>; + }; + + scif3_rs_232_485_mux: mux-controller-5 { + compatible = "gpio-mux"; + /* default rs232 */ + idle-state = <0>; + #mux-control-cells = <0>; + /* + * Mux switches scif3 tx/rx between rs232 and rs485 + * transceivers. using one GPIO: 0 = rs232, 1 = rs485. + */ + mux-gpios = <&tca6416_u20 2 GPIO_ACTIVE_HIGH>; + }; + + v_1_2: regulator-1-2 { + compatible = "regulator-fixed"; + regulator-name = "1v2"; + regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <1200000>; + }; + + v_3_3: regulator-3-3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + }; + + reg_dsi_panel: regulator-dsi-panel { + compatible = "regulator-fixed"; + regulator-name = "dsi-panel"; + gpios = <&tca6416_u20 15 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <11200000>; + regulator-min-microvolt = <11200000>; + enable-active-high; + }; + + vmmc: regulator-mmc { + compatible = "regulator-fixed"; + regulator-name = "vmmc"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + startup-delay-us = <250>; + vin-supply = <&v_3_3>; + gpios = <&pinctrl RZG2L_GPIO(4, 1) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + /* power for USB-A J5003 */ + vbus1: regulator-vbus-1 { + compatible = "regulator-fixed"; + regulator-name = "vbus1"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + gpios = <&tca6416_u20 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + rfkill-m2-b-gnss { + compatible = "rfkill-gpio"; + /* rfkill-gpio inverts internally */ + shutdown-gpios = <&tca6416_u20 10 GPIO_ACTIVE_LOW>; + label = "m2-b gnss"; + radio-type = "gps"; + }; + + rfkill-m2-b-wwan { + compatible = "rfkill-gpio"; + /* rfkill-gpio inverts internally */ + shutdown-gpios = <&tca6416_u20 9 GPIO_ACTIVE_HIGH>; + label = "m2-b radio"; + radio-type = "wwan"; + }; +}; + +&ehci1 { + #address-cells = <1>; + #size-cells = <0>; + + hub_2_0: hub@1 { + compatible = "usb4b4,6502", "usb4b4,6506"; + reg = <1>; + reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>; + vdd2-supply = <&v_3_3>; + vdd-supply = <&v_1_2>; + }; +}; + +&i2c0 { + /* highest i2c clock supported by all peripherals is 400kHz */ + + tca6416_u20: gpio@20 { + compatible = "ti,tcal6416"; + reg = <0x20>; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = "TCA_INT/EXT_UART", "TCA_UARTA_232/485", + "TCA_UARTB_232/485", "TCA_INT/EXT_CAN", + "TCA_NXP/REN", "TCA_M.2B_3V3_EN", + "TCA_M.2M_3V3_EN", "TCA_M.2M_RESET#", + "TCA_M.2B_RESET#", "TCA_M.2B_W_DIS#", + "TCA_M.2B_GPS_EN#", "TCA_USB-HUB_RST#", + "TCA_USB_HUB3_PWR_EN", "TCA_USB_HUB4_PWR_EN", + "TCA_USB1_PWR_EN", "TCA_VIDEO_PWR_EN"; + + m2-b-reset-hog { + gpios = <8 GPIO_ACTIVE_LOW>; + gpio-hog; + line-name = "m2-b-reset"; + output-low; + }; + + m2-m-reset-hog { + gpios = <7 GPIO_ACTIVE_LOW>; + gpio-hog; + line-name = "m2-m-reset"; + /* + * M.2 Key-M connector only supports PCI, + * but RZ/G2L(C) has no pci controller. + * Keep any card in reset. + */ + output-high; + }; + }; + + tca6416_u21: gpio@21 { + compatible = "ti,tcal6416"; + reg = <0x21>; + #interrupt-cells = <2>; + interrupt-controller; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = "TCA_SPI_TPM/EXT", "TCA_TPM_RST#", + "TCA_I2C_RST", "TCA_RS232_SHTD#", + "TCA_LCD_I2C_RST", "TCA_DIG_OUT1", + "TCA_bDIG_IN1", "TCA_SENS_INT", + "TCA_ALERT#", "TCA_TPM_PIRQ#", + "TCA_RTC_INT", "TCA_M.2M_WAKW_ON_LAN", + "TCA_M.2M_CLKREQ#", "TCA_LVDS_INT#", + "", "TCA_POE_AT"; + /* Level triggered irq does not currently work well on RZ/G2L, fall-back to edge */ + interrupts-extended = <&pinctrl RZG2L_GPIO(4, 0) IRQ_TYPE_EDGE_FALLING>; + + lcd-i2c-reset-hog { + gpios = <4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>; + line-name = "lcd-i2c-reset"; + output-low; + /* + * reset shared between U37 and U48, to be + * supported once gpio-pca953x switches to + * reset framework. + */ + gpio-hog; + }; + + lvds-irq-hog { + gpios = <13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + gpio-hog; + input; + line-name = "lvds-irq"; + }; + + m2-m-clkreq-hog { + gpios = <12 GPIO_ACTIVE_LOW>; + gpio-hog; + input; + line-name = "m2-m-clkreq"; + }; + + rs232_shutdown: rs232-shutdown-hog { + gpios = <3 GPIO_ACTIVE_LOW>; + gpio-hog; + line-name = "rs232-shutdown"; + output-low; + }; + + sensor-irq-hog { + gpios = <7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + gpio-hog; + input; + line-name = "sensor-irq"; + }; + + tpm-irq-hog { + gpios = <9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + gpio-hog; + input; + line-name = "tpm-irq"; + }; + }; + + led-controller@30 { + compatible = "ti,lp5562"; + reg = <0x30>; + #address-cells = <1>; + #size-cells = <0>; + /* use internal clock, could use external generated by rtc */ + clock-mode = /bits/ 8 <1>; + + multi-led@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + color = ; + label = "D7"; + + led@0 { + reg = <0x0>; + color = ; + led-cur = /bits/ 8 <0x32>; + max-cur = /bits/ 8 <0x64>; + }; + + led@1 { + reg = <0x1>; + color = ; + led-cur = /bits/ 8 <0x19>; + max-cur = /bits/ 8 <0x32>; + }; + + led@2 { + reg = <0x2>; + color = ; + led-cur = /bits/ 8 <0x19>; + max-cur = /bits/ 8 <0x32>; + }; + }; + + led@3 { + reg = <0x3>; + chan-name = "D8"; + color = ; + label = "D8"; + led-cur = /bits/ 8 <0x19>; + max-cur = /bits/ 8 <0x64>; + }; + }; + + light-sensor@44 { + compatible = "isil,isl29023"; + reg = <0x44>; + /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */ + interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_LEVEL_LOW>; + }; + + accelerometer@53 { + compatible = "adi,adxl345"; + reg = <0x53>; + interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_LEVEL_LOW>; + /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */ + interrupt-names = "INT1"; + }; + + carrier_eeprom: eeprom@57 { + compatible = "atmel,24c02"; + reg = <0x57>; + pagesize = <8>; + }; + + carrier_rtc: rtc@69 { + compatible = "abracon,ab1805"; + reg = <0x69>; + /* + * AM1805 RTC used on this board has only nTIRQ pins wired, + * which is for countdown timer irqs only. + * Driver does not support this, disable for now. + * + * interrupts-extended = <&tca6416_u21 10 IRQ_TYPE_LEVEL_LOW>; + */ + abracon,tc-diode = "schottky"; + abracon,tc-resistor = <3>; + }; +}; + +&i2c1 { + /* highest i2c clock supported by all peripherals is 400kHz */ + + i2c-mux@70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + /* + * This reset is open drain with HW 10k pull-up resistor, + * but reset core does not support GPIO_OPEN_DRAIN flag. + * The pull-up and GPIO voltages match, push-pull is safe. + */ + reset-gpios = <&tca6416_u21 2 GPIO_ACTIVE_LOW>; + + /* channel 0 routed to expansion connector (J22) */ + i2c_exp: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* channel 1 routed to mipi-csi connector (J23) */ + i2c_csi: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* channel 2 routed to mipi-dsi connector (J25) */ + i2c_dsi: i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + tca6408_u48: gpio@21 { + compatible = "ti,tca6408"; + reg = <0x21>; + #gpio-cells = <2>; + gpio-line-names = "CAM_RST#", "DSI_RESET", + "DSI_STBYB", "DSI_PWM_BL", + "DSI_L/R", "DSI_U/D", + "DSI_CTP_/RST", "CAM_TRIG"; + /* + * reset shared between U37 and U48, to be + * supported once gpio-pca953x switches to + * reset framework. + * + * reset-gpios = <&tca6416_u21 4 + * (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>; + */ + gpio-controller; + }; + }; + + /* channel 3 routed to lvds connector (J24) */ + i2c_lvds: i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + tca6408_u37: gpio@20 { + compatible = "ti,tca6408"; + reg = <0x20>; + #gpio-cells = <2>; + gpio-line-names = "SELB", "LVDS_RESET", + "LVDS_STBYB", "LVDS_PWM_BL", + "LVDS_L/R", "LVDS_U/D", + "LVDS_CTP_/RST", ""; + /* + * reset shared between U37 and U48, to be + * supported once gpio-pca953x switches to + * reset framework. + * + * reset-gpios = <&tca6416_u21 4 + * (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>; + */ + gpio-controller; + }; + }; + }; +}; + +&phy0 { + leds { + #address-cells = <1>; + #size-cells = <0>; + + /* LED_0 pin */ + led@0 { + reg = <0>; + color = ; + default-state = "keep"; + function = LED_FUNCTION_LAN; + }; + }; +}; + +&pinctrl { + /* UARTA */ + scif1_pins: scif1 { + pinmux = , /* SCIF1_RXD */ + ; /* SCIF1_TXD */ + }; + + /* UARTB */ + scif3_pins: scif3 { + pinmux = , /* SCIF3_RXD */ + ; /* SCIF3_TXD */ + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&scif3 { + pinctrl-0 = <&scif3_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&spi1 { + /* native cs does not support cs persistence required for tpm */ + cs-gpios = <&pinctrl RZG2L_GPIO(44, 3) GPIO_ACTIVE_LOW>; + num-cs = <1>; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + status = "okay"; + + spi1_muxed: spi@0 { + compatible = "spi-mux"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + mux-controls = <&spi_mux>; + /* mux bandwidth is 2GHz, soc max. spi clock is P0/2 = 50MHz */ + spi-max-frequency = <50000000>; + + tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0>; + interrupts-extended = <&tca6416_u21 9 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&tca6416_u21 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + spi-max-frequency = <43000000>; + }; + }; +}; + +&ohci0 { + dr_mode = "host"; +}; + +&usb2_phy0 { + vbus-supply = <&vbus1>; +}; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-microsd.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-microsd.dtso new file mode 100644 index 000000000000..c86d46956f82 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-microsd.dtso @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* +* Device Tree Overlay for the RZ/G2L(C) Solidrun SOM SD +* +* Copyright (C) 2024 SolidRun Ltd. +*/ + +/dts-v1/; +/plugin/; + +#include +#include + +&sdhi0 { + bus-width = <4>; + full-pwr-cycle; + mux-states = <&sdhi0_mux 1>; + pinctrl-0 = <&sdhi0_4bit_pins>, <&sdhi0_cd_pins>; + pinctrl-1 = <&sdhi0_4bit_uhs_pins>, <&sdhi0_cd_pins>; + pinctrl-names = "default", "state_uhs"; + sd-uhs-sdr104; + sd-uhs-sdr50; + vmmc-supply = <&vmmc>; + vqmmc-supply = <®_pmic_ldo1>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-a.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-a.dtso new file mode 100644 index 000000000000..4bcb22d518f0 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-a.dtso @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2025 Josua Mayer + * + * Overlay for enabling HummingBoard IIoT on-board RS485 Port A on connector J5004. + * + * Because Renesas uart driver does not support rs485, + * users must manually toggle P41_1 between RX & TX. + */ + +/dts-v1/; +/plugin/; + +&scif1_rs_232_485_mux { + /* select rs485 */ + idle-state = <1>; +}; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-b.dtso b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-b.dtso new file mode 100644 index 000000000000..6f460b3e0b25 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-rs485-b.dtso @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2025 Josua Mayer + * + * Overlay for enabling HummingBoard IIoT on-board RS485 Port B on connector J5004. + * + * Because Renesas uart driver does not support rs485, + * users must manually toggle P41_0 between RX & TX. + */ + +/dts-v1/; +/plugin/; + +&scif3_rs_232_485_mux { + /* select rs485 */ + idle-state = <1>; +}; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi new file mode 100644 index 000000000000..22f066079e69 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot.dtsi @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright 2025 Josua Mayer + */ + +#include "rzg2l-hummingboard-iiot-common.dtsi" + +&canfd { + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>, <&can1_pins>; + status = "okay"; + + channel0 { + status = "okay"; + }; + + channel1 { + status = "okay"; + }; +}; + +&phy1 { + leds { + #address-cells = <1>; + #size-cells = <0>; + + /* LED_0 pin */ + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; +}; + +&pinctrl { + /* CANA */ + can0_pins: can0 { + pinmux = , /* CAN0_TX */ + ; /* CAN0_RX */ + }; + + /* CANB */ + can1_pins: can1 { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; +}; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso b/arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso new file mode 100644 index 000000000000..263a36994b03 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-sr-som-emmc.dtso @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* +* Device Tree Overlay for the RZ/G2L(C) Solidrun SOM eMMC +* +* Copyright (C) 2024 SolidRun Ltd. +*/ + +/dts-v1/; +/plugin/; + +#include +#include + +®_pmic_ldo1 { + /* + * This ldo can switch mmc host controller io voltage between + * 1.8V and 3.3V. The eMMC IO voltage however is supplied from + * reg_pmic_buck3 which is fixed at 1.8V. + * Lower this ldo maximum voltage to 1.8V to prevent setting 3.3V. + */ + regulator-max-microvolt = <1800000>; +}; + +&sdhi0 { + /* + * Host controller and eMMC have separate io voltage regulators: + * reg_pmic_ldo1 (1.8V/3.3V); reg_pmic_buck3 (1.8V only). + * Link to the switchable regulator ensuring that it gets configured. + */ + vqmmc-supply = <®_pmic_ldo1>; + bus-width = <8>; + cap-mmc-hw-reset; + mmc-hs200-1_8v; + mux-states = <&sdhi0_mux 0>; + non-removable; + no-sdio; + pinctrl-0 = <&sdhi0_8bit_uhs_pins>, <&sdhi0_rst_pins>; + pinctrl-1 = <&sdhi0_8bit_uhs_pins>, <&sdhi0_rst_pins>; + pinctrl-names = "default", "state_uhs"; + vmmc-supply = <®_pmic_buck4>; + /* emmc io voltage is hard-wired for 1.8V, disable sd modes */ + no-sd; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi new file mode 100644 index 000000000000..32e967aa9e51 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi @@ -0,0 +1,451 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ/G2L Solidrun SoM + * + * Copyright 2023 SolidRun Ltd. + * Copyright 2025 Josua Mayer + */ + +#include +#include +/ { + aliases { + ethernet0 = ð0; + ethernet1 = ð1; + gpio0 = &pinctrl; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c3; + mmc0 = &sdhi0; + mmc1 = &sdhi1; + rtc0 = &pmic; + serial0 = &scif0; + serial1 = &scif1; + serial2 = &scif2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + sdhi0_mux: mux-controller-0 { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + #mux-state-cells = <1>; + /* + * Mux switches SD0_DATA[0-3], SD0_CMD & SD0_CLK between + * on-SoM eMMC and board-to-board connector using one gpio: + * Low = connector, High = eMMC. + * Define active-low for logical mux state 0 = eMMC, 1 = connector. + */ + mux-gpios = <&pinctrl RZG2L_GPIO(22, 1) GPIO_ACTIVE_LOW>; + }; + + clk_pmic_32k: pmic-32k-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + reg_pmic_buck1: regulator-pmic-buck1 { + compatible = "regulator-fixed"; + regulator-name = "pmic-buck1"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + }; + + reg_pmic_buck3: regulator-pmic-buck3 { + compatible = "regulator-fixed"; + regulator-name = "pmic-buck3"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + }; + + reg_pmic_buck4: regulator-pmic-buck4 { + compatible = "regulator-fixed"; + regulator-name = "pmic-buck4"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + }; + + reg_pmic_ldo1: regulator-pmic-ldo1 { + compatible = "regulator-gpio"; + regulator-name = "pmic-ldo1"; + gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + states = <3300000 1>, <1800000 0>; + }; + + reg_pmic_ldo2: regulator-pmic-ldo2 { + compatible = "regulator-fixed"; + regulator-name = "pmic-ldo2"; + /* + * This ldo can switch mmc host controller io voltage between + * 1.8V and 3.3V by assembly option of pull-up / pull-dow. + * Default assembly is 3.3V. + */ + regulator-min-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + }; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + + mmp_reserved: linux,multimedia@68000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x68000000 0x0 0x8000000>; + reusable; + }; + + global_cma: linux,cma@58000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x58000000 0x0 0x10000000>; + reusable; + linux,cma-default; + }; + }; + + sdhi1_pwrseq: sdhi1-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pinctrl RZG2L_GPIO(23, 1) GPIO_ACTIVE_LOW>; + }; + + /* 32.768kHz crystal */ + x2: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + memory@40000000 { + reg = <0x0 0x40000000 0x0 0x40000000>; + device_type = "memory"; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +ð0 { + phy-handle = <&phy0>; + pinctrl-0 = <ð0_pins>; + pinctrl-names = "default"; + /* + * ravb driver does not configure mac internal delays for RZ/G2L(C), + * instead delays are added by the MxL86110 phy driver. + */ + phy-mode = "rgmii-id"; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + interrupts-extended = <&pinctrl RZG2L_GPIO(27, 0) IRQ_TYPE_LEVEL_LOW>; + }; +}; + +ð1 { + phy-handle = <&phy1>; + pinctrl-0 = <ð1_pins>; + pinctrl-names = "default"; + /* + * ravb driver does not configure mac internal delays for RZ/G2L(C), + * instead delays are added by the MxL86110 phy driver. + */ + phy-mode = "rgmii-id"; + status = "okay"; + + phy1: ethernet-phy@4 { + reg = <4>; + interrupts-extended = <&pinctrl RZG2L_GPIO(42, 4) IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&extal_clk { + clock-frequency = <24000000>; +}; + +&gpu { + mali-supply = <®_pmic_buck1>; +}; + +&i2c0 { + clock-frequency = <400000>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c01"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&i2c3 { + clock-frequency = <400000>; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + status = "okay"; + + pmic: pmic@12 { + compatible = "renesas,raa215300"; + reg = <0x12>, <0x6f>; + reg-names = "main", "rtc"; + clocks = <&x2>; + clock-names = "xin"; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&ostm1 { + status = "okay"; +}; + +&ostm2 { + status = "okay"; +}; + +&phyrst { + status = "okay"; +}; + +&pinctrl { + eth0_pins: eth0 { + pinmux = , /* ET0_LINKSTA */ + , /* ET0_MDC */ + , /* ET0_MDIO */ + , /* ET0_TXC */ + , /* ET0_TX_CTL */ + , /* ET0_TXD0 */ + , /* ET0_TXD1 */ + , /* ET0_TXD2 */ + , /* ET0_TXD3 */ + , /* ET0_RXC */ + , /* ET0_RX_CTL */ + , /* ET0_RXD0 */ + , /* ET0_RXD1 */ + , /* ET0_RXD2 */ + ; /* ET0_RXD3 */ + }; + + eth1_pins: eth1 { + pinmux = , /* ET1_LINKSTA */ + , /* ET1_MDC */ + , /* ET1_MDIO */ + , /* ET1_TXC */ + , /* ET1_TX_CTL */ + , /* ET1_TXD0 */ + , /* ET1_TXD1 */ + , /* ET1_TXD2 */ + , /* ET1_TXD3 */ + , /* ET1_RXC */ + , /* ET1_RX_CTL */ + , /* ET1_RXD0 */ + , /* ET1_RXD1 */ + , /* ET1_RXD2 */ + ; /* ET1_RXD3 */ + }; + + i2c0_pins: i2c0 { + input-enable; + pins = "RIIC0_SDA", "RIIC0_SCL"; + }; + + i2c1_pins: i2c1 { + input-enable; + pins = "RIIC1_SDA", "RIIC1_SCL"; + }; + + i2c3_pins: i2c3 { + pinmux = , /* RIIC3_SDA */ + ; /* RIIC3_SCL */ + }; + + qspi0_pins: qspi0 { + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3", + "QSPI0_SPCLK", "QSPI0_SSL"; + power-source = <1800>; + }; + + scif0_pins: scif0 { + pinmux = , /* SCIF0_TXD */ + ; /* SCIF0_RXD */ + }; + + scif2_pins: scif2 { + pinmux = , /* SCIF2_TXD */ + , /* SCIF2_RXD */ + , /* SCIF2_CTS# */ + ; /* SCIF2_RTS# */ + }; + + sdhi0_4bit_pins: sdhi0-4bit { + sd0_ctrl_dat03 { + pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", + "SD0_CLK", "SD0_CMD"; + power-source = <3300>; + }; + + /* + * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage, + * with all pins sharing a single voltage domain. + * + * Configure as input without pull to avoid overvoltage, + * and accidental use e.g. as gpio (default pin-function). + */ + sd0_dat47 { + bias-disable; + input-enable; + pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7"; + power-source = <3300>; + }; + }; + + sdhi0_4bit_uhs_pins: sdhi0-4bit-uhs { + sd0_ctrl_dat03 { + pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", + "SD0_CLK", "SD0_CMD"; + power-source = <1800>; + }; + + /* + * Pins 4-7 are hard-wired to eMMC with 1.8V IO voltage, + * with all pins sharing a single voltage domain. + * + * Configure as input without pull to avoid accidental use, + * e.g. as gpio (default pin-function). + */ + sd0_dat47 { + bias-disable; + input-enable; + pins = "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7"; + power-source = <1800>; + }; + }; + + sdhi0_8bit_uhs_pins: sdhi0-8bit-uhs { + pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3", + "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7", + "SD0_CLK", "SD0_CMD"; + power-source = <1800>; + }; + + sdhi0_cd_pins: sdhi0-cd { + pinmux = ; /* SD0_CD */ + }; + + /* SD0_RST is only routed to eMMC which uses fixed 1.8V IO voltage */ + sdhi0_rst_pins: sdhi0-rst { + pins = "SD0_RST#"; + power-source = <1800>; + }; + + sdhi1_pins: sdhi1 { + pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", + "SD1_CLK", "SD1_CMD"; + power-source = <3300>; + }; + + spi1_pins: spi1 { + pinmux = , /* RSPI1_MISO */ + , /* RSPI1_MOSI# */ + ; + }; + + spi1_cs_pins: spi1-cs { + pinmux = ; /* RSPI1_SSL */ + }; +}; + +&sbc { + pinctrl-0 = <&qspi0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "winbond,w25q80bl", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + status = "okay"; +}; + +/* WiFi */ +&sdhi1 { + /* Murata 1MW max rate is 50MHz */ + max-frequency = <50000000>; + bus-width = <4>; + cap-sdio-irq; + mmc-pwrseq = <&sdhi1_pwrseq>; + non-removable; + no-1-8-v; + no-sd; + pinctrl-0 = <&sdhi1_pins>; + pinctrl-names = "default"; + vmmc-supply = <®_pmic_buck4>; + /* + * Host controller IO voltage is provided from reg_pmic_ldo2, + * WiFi module IO voltage from reg_pmic_buck4. + * Neither is configurable at run-time so either can be set here. + */ + vqmmc-supply = <®_pmic_ldo2>; + status = "okay"; +}; + +&usb2_phy0 { + vbus-supply = <&usb0_vbus_otg>; + status = "okay"; +}; + +&usb2_phy1 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; -- 2.43.0