Re: [PATCH v5 2/2] iio: adc: add Axiado SARADC driver

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The ADC conversion delay calculation ignores the configured sampling time (or oversampling), potentially causing premature reads.
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--- Patch [2]: [PATCH v5 2/2] iio: adc: add Axiado SARADC driver ---
commit d29fd02ad40c12a8c4f338bf8bdde17a93221079
Author: Petar Stepanovic <pstepanovic@axiado.com>

iio: adc: add Axiado SARADC driver

Add support for the SARADC controller found on Axiado AX3000 and
AX3005 SoCs. The driver supports single-shot voltage reads through
the IIO subsystem.

> diff --git a/drivers/iio/adc/axiado_saradc.c b/drivers/iio/adc/axiado_saradc.c
> new file mode 100644
> index 0000000000000..daa98dd2f1761
> --- /dev/null
> +++ b/drivers/iio/adc/axiado_saradc.c

[ ... ]

> +static int axiado_saradc_conversion(struct axiado_saradc *info,
> +				    struct iio_chan_spec const *chan, int *val)
> +{
> +	unsigned long usecs;
> +	unsigned int regval;
> +	int ret;
> +
> +	guard(mutex)(&info->lock);
> +
> +	/* Select the channel to be used and trigger conversion */
> +	ret = regmap_write(info->regmap, AX_SARADC_MANUAL_CTRL_REG,
> +			   AX_SARADC_MANUAL_CTRL_ENABLE |
> +			   FIELD_PREP(AX_SARADC_MANUAL_CTRL_CH_SEL_MASK, chan->channel));
> +	if (ret)
> +		return ret;
> +
> +	/* Hardware requires 13 conversion cycles at clk_rate */
> +	usecs = DIV_ROUND_UP(AX_SARADC_CONV_CYCLES * USEC_PER_SEC,
> +			     info->clk_rate);
> +	fsleep(usecs + AX_SARADC_CONV_DELAY_MARGIN_US);

[Severity: Medium]
Does this wait time calculation need to account for the configured sampling
time?

In axiado_saradc_probe(), AX_SARADC_GLOBAL_CTRL_SAMPLE_MASK is configured to
AX_SARADC_GLOBAL_CTRL_SAMPLE_16 (which selects 16 samples). Calculating the
wait strictly as 13 conversion cycles seems to ignore the extra time needed
for these 16 samples.

At lower clock rates, could the sleep finish before the conversion actually
completes and lead to premature reads?

> +
> +	ret = regmap_read(info->regmap, AX_SARADC_DOUT_REG, &regval);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260810-axiado-ax3000-ax3005-saradc-v5-0-bb0df3ecedaa@axiado.com?part=2