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Mon, 10 Aug 2026 11:37:56 -0700 (PDT) From: Bhargav Joshi Date: Tue, 11 Aug 2026 00:07:37 +0530 Subject: [PATCH v2] dt-bindings: clock: ti,DM814x-ADPLL: Convert to DT schema Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260811-ti-adpll-v2-1-f578b253bde5@gmail.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/0WNyw6CMBBFf4XM2pq2Qqmu/A/DorZTGFMeaZFoC P8uYIzLk5x77gwJI2GCSzZDxIkS9d0K8pCBbUxXIyO3MkguFS9lwUZixg0hMOe80znm6IWGVR8 ienrtqVv15fS8P9CO234zGkpjH9/71yQ275dV/+wkmGBaeeXt+aQKXl7r1lA42r6FalmWDxhUZ QSyAAAA X-Change-ID: 20260725-ti-adpll-ddfd84e4ef18 To: Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tony Lindgren Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, goledhruva@gmail.com, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com, j.bhargav.u@gmail.com X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786387070; l=4828; i=j.bhargav.u@gmail.com; h=from:subject:message-id; bh=SkE6ePlUHBWkhyEachrZ7O5pW4NWv5G8XNJ67TLvx5A=; b=e8VbaMTGYscunfjxrSGTB+I3AZOV46XSEsMe96PZYdESm8n+K+Su1jdpJHSwJMuRcFPwV9fRW g2cQweiTHJhAvnWFZX7cjttuNkuPLVgsSS/J1SwAghyALhx215f/KSm X-Developer-Key: i=j.bhargav.u@gmail.com; a=ed25519; pk=IqNDwUZKECEA+n8wXctFLBbYL9NhFstZNbOznm/nX1k= Convert the Texas Instruments DM814x ADPLL clock binding to DT schema format. Add 'clock-output-names' as required which was missing in legacy binding, as the driver (clk-adpll.c) mandates it and fails probing if it is missing. Signed-off-by: Bhargav Joshi --- Changes in v2: - Droped description for items clock-output-names - Dropped extra example - Link to v1: https://lore.kernel.org/r/20260726-ti-adpll-v1-1-86f6fc936507@gmail.com --- .../devicetree/bindings/clock/ti/adpll.txt | 39 ---------- .../bindings/clock/ti/ti,dm814-adpll-clock.yaml | 88 ++++++++++++++++++++++ 2 files changed, 88 insertions(+), 39 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/ti/adpll.txt b/Documentation/devicetree/bindings/clock/ti/adpll.txt deleted file mode 100644 index 3122360adcf3..000000000000 --- a/Documentation/devicetree/bindings/clock/ti/adpll.txt +++ /dev/null @@ -1,39 +0,0 @@ -Binding for Texas Instruments ADPLL clock. - -This binding uses the common clock binding[1]. It assumes a -register-mapped ADPLL with two to three selectable input clocks -and three to four children. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- compatible : shall be one of "ti,dm814-adpll-s-clock" or - "ti,dm814-adpll-lj-clock" depending on the type of the ADPLL -- #clock-cells : from common clock binding; shall be set to 1. -- clocks : link phandles of parent clocks clkinp and clkinpulow, note - that the adpll-s-clock also has an optional clkinphif -- reg : address and length of the register set for controlling the ADPLL. - -Examples: - adpll_mpu_ck: adpll@40 { - #clock-cells = <1>; - compatible = "ti,dm814-adpll-s-clock"; - reg = <0x40 0x40>; - clocks = <&devosc_ck &devosc_ck &devosc_ck>; - clock-names = "clkinp", "clkinpulow", "clkinphif"; - clock-output-names = "481c5040.adpll.dcoclkldo", - "481c5040.adpll.clkout", - "481c5040.adpll.clkoutx2", - "481c5040.adpll.clkouthif"; - }; - - adpll_dsp_ck: adpll@80 { - #clock-cells = <1>; - compatible = "ti,dm814-adpll-lj-clock"; - reg = <0x80 0x30>; - clocks = <&devosc_ck &devosc_ck>; - clock-names = "clkinp", "clkinpulow"; - clock-output-names = "481c5080.adpll.dcoclkldo", - "481c5080.adpll.clkout", - "481c5080.adpll.clkoutldo"; - }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,dm814-adpll-clock.yaml b/Documentation/devicetree/bindings/clock/ti/ti,dm814-adpll-clock.yaml new file mode 100644 index 000000000000..9676ab2d8705 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/ti,dm814-adpll-clock.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti/ti,dm814-adpll-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments DM814x ADPLL Clock + +maintainers: + - Tony Lindgren + +description: + The ADPLL is a register-mapped clock generator found on TI DM814x SoCs. It + provides multiple output clocks from two or three selectable input clocks and + three to four children. + +properties: + compatible: + enum: + - ti,dm814-adpll-s-clock + - ti,dm814-adpll-lj-clock + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + minItems: 2 + maxItems: 3 + + clock-names: + minItems: 2 + items: + - const: clkinp + - const: clkinpulow + - const: clkinphif + + clock-output-names: + minItems: 3 + maxItems: 4 + +required: + - compatible + - reg + - '#clock-cells' + - clocks + - clock-output-names + +if: + properties: + compatible: + contains: + const: ti,dm814-adpll-s-clock +then: + properties: + clocks: + minItems: 3 + clock-names: + minItems: 3 + clock-output-names: + minItems: 4 + +else: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + clock-output-names: + maxItems: 3 + +additionalProperties: false + +examples: + - | + adpll@40 { + compatible = "ti,dm814-adpll-s-clock"; + reg = <0x40 0x40>; + #clock-cells = <1>; + clocks = <&devosc_ck &devosc_ck &devosc_ck>; + clock-names = "clkinp", "clkinpulow", "clkinphif"; + clock-output-names = "481c5040.adpll.dcoclkldo", + "481c5040.adpll.clkout", + "481c5040.adpll.clkoutx2", + "481c5040.adpll.clkouthif"; + }; --- base-commit: 0ce37745d4bfbc493f718169c3974898ffec8ee7 change-id: 20260725-ti-adpll-ddfd84e4ef18 Best regards, -- Bhargav