From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2D2F473C9C; Thu, 13 Aug 2026 12:00:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786622401; cv=none; b=G/9tugy+2Yg0CbqkH1bRQI2vtkDhIdH9j8ZlbsAAMJa5ZGVCLd3wKE+WV25FXNGUBcflGMmTI9P5vi9miDm47bQnKf6LqS/2awlir8mGAPH1+jphgnhAR8J46U2txjz1ZmcyplMnJywuSJ76IBf+MpIs+u2lskwLftxGFemCwiU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786622401; c=relaxed/simple; bh=U/VelihwE9/Y5DyVuu89kZaY6Foh61jZ62a+Hvygccg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lYhNXwFyf5gL5DaqUTEeuHNEyWQjV9H6pvQKEIWdkyCRRYAiOdCu2al/7Eo6FzxF4nhhbA3xY5KdJAEcwnMd4rFZYK0xaK7l+ZBpLFLip0AhDWOuPp9Ra7z6pLV62hD8TV4qmIx63O5/Ofniyh6xGK4iV8xEx3qRM/4QZwQTKpw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=j+KMOlEy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="j+KMOlEy" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3B776C2BCFA; Thu, 13 Aug 2026 12:00:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1786622400; bh=U/VelihwE9/Y5DyVuu89kZaY6Foh61jZ62a+Hvygccg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=j+KMOlEy+u60KRacqH0Q+y62+8kT6IomOsLPPe8Yyk6gEoDjvWp0qlDPBB4hAXC64 pYpGhihgkxdK6WRNK7QVF9z6Bvtb/r71W8jbzTAhsC61V1Oj3lr4lO4aqcWMBjQ7c/ k+W0fix1lXhW4mDhf6o416yg2yVLBERRrWgsQYcR2o1BbfaK7pKLCzVYCmTLYJ7SLs sWvS1T3LhhKnR4lZHXOVzuStlcmhhq74KuOavqdhQk4tF7pnjXiCfJrN22Icde/2gA g6a6oibg8UkPIT/YMdjkY3RStAMLLj6U99bb5njJ8gcUP5Y7IoI1barNv0kAF5hBsa HLvx57NNVaDMw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1855EC5DF6A; Thu, 13 Aug 2026 12:00:00 +0000 (UTC) From: Colin Huang via B4 Relay Date: Thu, 13 Aug 2026 19:59:38 +0800 Subject: [PATCH v5 08/15] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260813-anacapa-devlop-phase-devicetree-v5-8-c7058f63dc67@gmail.com> References: <20260813-anacapa-devlop-phase-devicetree-v5-0-c7058f63dc67@gmail.com> In-Reply-To: <20260813-anacapa-devlop-phase-devicetree-v5-0-c7058f63dc67@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Andy Chung X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786622378; l=3214; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=BGZCKTF8QAag1qskLE0ofPzySUEOSMb3NZgJbIMmwIo=; b=tRnCdt4HSTs3hCltmEhSl2IJBUqZkdHlCNGz1d1Sabm22vJGqKb75T93B8qcX0xc4HkM3vwlY ISTLQn7AdYgCzKvzR3UwUsQynWFKP2PSEpnvc/tFoR7VwEn963jPVMO X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Andy Chung Add the mctp-controller property to enable frontend NIC management via PLDM over MCTP. Also add EEPROM device for NIC FRU and reorder the I2C virtual bus index accroding to the system silkscreen index. Signed-off-by: Andy Chung --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 119 +++++++++++++++++++++ 1 file changed, 119 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index ff393ad7cdb7..703284721224 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -8,6 +8,25 @@ / { compatible = "facebook,anacapa-bmc-evt2", "aspeed,ast2600"; }; +&{/aliases} { + i2c36 = &i2c11mux0ch5; + i2c37 = &i2c11mux0ch6; + i2c38 = &i2c11mux0ch7; + i2c39 = &i2c11mux0ch0; + i2c40 = &i2c11mux0ch1; + i2c41 = &i2c11mux0ch2; + i2c42 = &i2c11mux0ch3; + i2c43 = &i2c11mux0ch4; + i2c44 = &i2c10mux0ch1; + i2c45 = &i2c10mux0ch2; + i2c46 = &i2c10mux0ch3; + i2c47 = &i2c10mux0ch4; + i2c48 = &i2c10mux0ch5; + i2c49 = &i2c10mux0ch6; + i2c50 = &i2c10mux0ch7; + i2c51 = &i2c10mux0ch0; +}; + // MB - PDB &i2c8 { i2c-mux@72 { @@ -55,6 +74,106 @@ eeprom@51 { }; }; +// R Bridge Board +&i2c10 { + multi-master; + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c10mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c10mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c10mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c10mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + +// L Bridge Board +&i2c11 { + multi-master; + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c11mux0ch0: i2c@0 { + mctp-controller; + // FE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c11mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + // MB &i2c13 { i2c-mux@70 { -- 2.34.1