From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from naesa04.arrow.com (naesa04.arrow.com [216.150.161.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 142CA3DEFE3; Fri, 14 Aug 2026 07:00:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.150.161.24 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786690818; cv=none; b=an7OSFUPKZZYu/8OHW4AM49BUK9OiefIMTveWHje3dou7GNLUJKYI1tsjmN6LDEQISqiBtK33nD/8EPMey2wyiEuLSIKeJ0Y4TPgh2eS053vyTLFzFQUxx5FXaTdDjM/VY5hn/WsBEZ/I9GvZkiKLW9mSmOcYwzPQ3sd5wxiCso= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786690818; c=relaxed/simple; bh=IgPFcaWjJKZXYSiDEOt9HHAeookxKAzELEI3gWtwbJ0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=H/GFbD0sMCSev7TPjiopEETeGeKLB9oa0nCO4o/AMl0qpnmOC4Nirb00J6zB0WktqfxPfoqMtOgJa8y3yjOIqcFTZC4aCr0Im5Pth/80Z45OQ7bfdzdiXQoiM7or/I48cvGQvX3Oc8BjTU42vjx4K6idHT4Ao1Oqom75DxZTCNg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=einfochips.com; spf=pass smtp.mailfrom=einfochips.com; dkim=pass (2048-bit key) header.d=einfochips.com header.i=@einfochips.com header.b=SZWa70Dr; arc=none smtp.client-ip=216.150.161.24 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=einfochips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=einfochips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=einfochips.com header.i=@einfochips.com header.b="SZWa70Dr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=einfochips.com; i=@einfochips.com; l=1135; q=dns/txt; s=NAESA-Selector1; t=1786690817; x=1818226817; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fhMulqfAdieip+w70VJod08BqyqQUojtyVidc3DwEBk=; b=SZWa70DroeVB239NCAUnvSlud5q3Kj9q0a4wpmJPzrev7hybZPU8IjHX 1RnzlX+3EgJ+FoZ+0wn3qThAI7F6c6IrSkwUy9BWxCb3MtbHq+swUQIc1 E9ZQPmPmyAoZVut5F38oHceA19JjY1bT+p7m7C5hzhc50g2cBuIt21A52 X/7V1zqjinmzIWN6arzfRpnwBa1AgaFHLZl8JgNLeYfuQaBUSID/+y1Cf +b65jove9p0RNiwla3jM+tHBBJwRhKKBBna52aKS15A4YXq6YiZc/Fb0x 1wFdV9ZyliaeHzTu4Ab6coxQUWMMqwtzjCBiYEM0Oq5oekr1sqFhR8x4P g==; X-CSE-ConnectionGUID: eyqVmTPxQGu3h8r8hgbteg== X-CSE-MsgGUID: wLqyug9VSuOqI8oTtyzv0Q== X-IronPort-AV: E=Sophos;i="6.25,222,1779170400"; d="scan'208";a="119916466" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa04out.arrow.com with ESMTP; 14 Aug 2026 01:00:15 -0600 Received: from AHMCPU1888.localdomain ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.20348.1); Fri, 14 Aug 2026 12:30:07 +0530 From: Pinkesh Vaghela To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andi Shyti , Mika Westerberg , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Min Lin Cc: Yulin Lu , Samuel Holland , Darshan Prajapati , Pinkesh Vaghela , Pritesh Patel Subject: [PATCH v4 4/7] riscv: dts: eswin: add hsp bus node Date: Fri, 14 Aug 2026 12:30:04 +0530 Message-Id: <20260814070007.1662455-5-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260814070007.1662455-1-pinkesh.vaghela@einfochips.com> References: <20260814070007.1662455-1-pinkesh.vaghela@einfochips.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-OriginalArrivalTime: 14 Aug 2026 07:00:07.0708 (UTC) FILETIME=[8A69BDC0:01DD2BBA] Add an HSP bus node to manage the HSP CFG clock used by HSP peripherals. This clock is required for accessing both the HSP CSR registers and the register spaces of HSP peripheral devices. Signed-off-by: Pinkesh Vaghela --- arch/riscv/boot/dts/eswin/eic7700.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi index b16e3e28632c..771a88645d83 100644 --- a/arch/riscv/boot/dts/eswin/eic7700.dtsi +++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi @@ -252,6 +252,19 @@ plic: interrupt-controller@c000000 { #interrupt-cells = <1>; }; + hsp: bus@50400000 { + compatible = "simple-pm-bus"; + ranges = <0x0 0x50400000 0x0 0x50400000 0x0 0xa0000>; + clocks = <&clk EIC7700_CLK_GATE_HSP_CFG_CLK>; + #address-cells = <2>; + #size-cells = <2>; + + syscon: syscon@50440000 { + compatible = "eswin,eic7700-syscfg", "syscon"; + reg = <0x0 0x50440000 0x0 0x2000>; + }; + }; + uart0: serial@50900000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x50900000 0x0 0x10000>; -- 2.34.1