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From: sashiko-bot@kernel.org
To: "Pinkesh Vaghela" <pinkesh.vaghela@einfochips.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 7/7] riscv: dts: eswin: add watchdog support
Date: Fri, 14 Aug 2026 07:14:28 +0000	[thread overview]
Message-ID: <20260814071429.62D0F1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260814070007.1662455-8-pinkesh.vaghela@einfochips.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The watchdog device tree nodes map the APB bus clock to the watchdog timer reference clock, ignoring the dedicated Watchdog Reference clock.
--

--- Patch [7]: [PATCH v4 7/7] riscv: dts: eswin: add watchdog support ---
commit 8bb5be57363c57f6d3977083d5441f186e416e96
Author: Pritesh Patel <pritesh.patel@einfochips.com>

riscv: dts: eswin: add watchdog support

Add watchdog node for ESWIN EIC7700 SoC and enable them for HiFive
Premier P550 board

> diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi
> index c13432d145042..f873e9eeb9290 100644
> --- a/arch/riscv/boot/dts/eswin/eic7700.dtsi
> +++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi
> @@ -265,6 +265,46 @@ syscon: syscon@50440000 {
>  			};
>  		};
>  
> +		wdt0: watchdog@50800000 {
> +			compatible = "snps,dw-wdt";
> +			reg = <0x0 0x50800000 0x0 0x4000>;
> +			interrupts = <87>;
> +			clocks = <&clk EIC7700_CLK_GATE_LSP_WDT0_PCLK>;
> +			clock-names = "tclk";

[Severity: High]
Is this node missing the dedicated watchdog reference clock?

The DesignWare APB Watchdog driver uses the frequency of tclk to calculate
watchdog timeout durations. Because only the APB bus clock
(EIC7700_CLK_GATE_LSP_WDT0_PCLK) is provided here, it appears the driver
will use the higher frequency of the APB clock for timeout calculations,
resulting in incorrectly calculated timeout values.

Additionally, if the dedicated watchdog reference clock
(EIC7700_CLK_GATE_NOC_WDREF) is omitted from the device tree entirely,
will the clock subsystem consider it unused and automatically disable it
during late boot? 

If the hardware is synthesized in asynchronous dual-clock mode, stopping the
reference clock might silently prevent the watchdog hardware from counting
altogether.

Should both the timer reference clock and the APB interface clock be
provided in the clocks list?

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260814070007.1662455-1-pinkesh.vaghela@einfochips.com?part=7

      reply	other threads:[~2026-08-14  7:14 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-14  7:00 [PATCH v4 0/7] riscv: eswin: eic7700: Add support for clocks, resets, pinctrl, HSP bus, I2C and watchdog Pinkesh Vaghela
2026-08-14  7:00 ` [PATCH v4 1/7] riscv: dts: eswin: add reset generator for EIC7700 SoC Pinkesh Vaghela
2026-08-14  7:00 ` [PATCH v4 2/7] riscv: dts: eswin: add clock " Pinkesh Vaghela
2026-08-14  7:07   ` sashiko-bot
2026-08-14  7:00 ` [PATCH v4 3/7] riscv: dts: eswin: eic7700: add pinctrl support Pinkesh Vaghela
2026-08-14  7:00 ` [PATCH v4 4/7] riscv: dts: eswin: add hsp bus node Pinkesh Vaghela
2026-08-14  7:11   ` sashiko-bot
2026-08-14  7:00 ` [PATCH v4 5/7] dt-bindings: i2c: dw: add ESWIN EIC7700 SoC I2C controller Pinkesh Vaghela
2026-08-14  7:00 ` [PATCH v4 6/7] riscv: dts: eswin: add I2C controller support Pinkesh Vaghela
2026-08-14  7:00 ` [PATCH v4 7/7] riscv: dts: eswin: add watchdog support Pinkesh Vaghela
2026-08-14  7:14   ` sashiko-bot [this message]

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