From: Jonathan Cameron <jic23@kernel.org>
To: Antoniu Miclaus <antoniu.miclaus@analog.com>
Cc: "Marcelo Schmitt" <marcelo.schmitt@analog.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"David Lechner" <dlechner@baylibre.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-iio@vger.kernel.org, linux@analog.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/3] iio: accel: adxl367: add support for INT2 interrupt pin
Date: Sun, 16 Aug 2026 01:39:36 +0100 [thread overview]
Message-ID: <20260816013936.01f135dc@jic23-huawei> (raw)
In-Reply-To: <20260813081452.4289-4-antoniu.miclaus@analog.com>
On Thu, 13 Aug 2026 11:14:52 +0300
Antoniu Miclaus <antoniu.miclaus@analog.com> wrote:
> The ADXL367 provides two independent interrupt output pins, INT1 and
> INT2, each with its own event mapping register (INTMAP1_LOWER at 0x2A
> and INTMAP2_LOWER at 0x2B) sharing an identical bit layout. Until now
> the driver hardcoded INT1 for all interrupt mappings, so a board that
> routes only INT2 to the host could never receive activity, inactivity
> or FIFO watermark interrupts.
>
> Determine the connected pin from the interrupt-names device tree
> property using fwnode_irq_get_byname(), and route the interrupt
> mappings to the matching register. When no interrupt-names are present,
> default to INT1 to preserve the existing behaviour.
>
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> Changes in v2:
> - Propagate -EPROBE_DEFER from fwnode_irq_get_byname().
> - Drop the redundant irq return; the helper now only selects the INT map
> register.
>
> drivers/iio/accel/adxl367.c | 39 ++++++++++++++++++++++++++++++++++---
> 1 file changed, 36 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iio/accel/adxl367.c b/drivers/iio/accel/adxl367.c
> index 8c3de11a10a3..df385740b17b 100644
> --- a/drivers/iio/accel/adxl367.c
> +++ b/drivers/iio/accel/adxl367.c
> @@ -13,6 +13,7 @@
> #include <linux/iio/sysfs.h>
> #include <linux/interrupt.h>
> #include <linux/irq.h>
> +#include <linux/property.h>
> #include <linux/regmap.h>
> #include <linux/regulator/consumer.h>
> #include <linux/unaligned.h>
> @@ -81,6 +82,7 @@
> #define ADXL367_SAMPLES_L_MASK GENMASK(7, 0)
>
> #define ADXL367_REG_INT1_MAP 0x2A
> +#define ADXL367_REG_INT2_MAP 0x2B
> #define ADXL367_INT_INACT_MASK BIT(5)
> #define ADXL367_INT_ACT_MASK BIT(4)
> #define ADXL367_INT_FIFO_WATERMARK_MASK BIT(2)
> @@ -168,6 +170,8 @@ struct adxl367_state {
> enum adxl367_odr odr;
> enum adxl367_range range;
>
> + u8 int_map_reg;
> +
> unsigned int act_threshold;
> unsigned int act_time_ms;
> unsigned int inact_threshold;
> @@ -366,7 +370,7 @@ static int adxl367_set_act_interrupt_en(struct adxl367_state *st,
> {
> unsigned int mask = adxl367_act_int_mask_tbl[act];
>
> - return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP,
> + return regmap_update_bits(st->regmap, st->int_map_reg,
> mask, en ? mask : 0);
Whilst here.
return regmap_assign_bits(st->regmap, st->int_map_reg, mask, en);
should do the job I think. Maybe it is worth a precursor or follow up
patch tidying up any other instances of this pattern in this driver.
(Note I haven't actually checked if there are any!)
> }
>
> @@ -378,7 +382,7 @@ static int adxl367_get_act_interrupt_en(struct adxl367_state *st,
> unsigned int val;
> int ret;
>
> - ret = regmap_read(st->regmap, ADXL367_REG_INT1_MAP, &val);
> + ret = regmap_read(st->regmap, st->int_map_reg, &val);
> if (ret)
> return ret;
>
> @@ -401,7 +405,7 @@ static int adxl367_set_act_en(struct adxl367_state *st,
> static int adxl367_set_fifo_watermark_interrupt_en(struct adxl367_state *st,
> bool en)
> {
> - return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP,
> + return regmap_update_bits(st->regmap, st->int_map_reg,
> ADXL367_INT_FIFO_WATERMARK_MASK,
> en ? ADXL367_INT_FIFO_WATERMARK_MASK : 0);
regmap_assign_bits()
> }
> @@ -1426,6 +1430,31 @@ static int adxl367_setup(struct adxl367_state *st)
> return adxl367_set_measure_en(st, true);
> }
>
> +static int adxl367_set_int_map_reg(struct adxl367_state *st)
> +{
> + int irq;
> +
> + irq = fwnode_irq_get_byname(dev_fwnode(st->dev), "INT1");
> + if (irq == -EPROBE_DEFER)
> + return irq;
> + if (irq > 0) {
> + st->int_map_reg = ADXL367_REG_INT1_MAP;
> + return 0;
> + }
> +
> + irq = fwnode_irq_get_byname(dev_fwnode(st->dev), "INT2");
> + if (irq == -EPROBE_DEFER)
> + return irq;
> + if (irq > 0) {
> + st->int_map_reg = ADXL367_REG_INT2_MAP;
> + return 0;
> + }
> +
> + /* No interrupt-names: default to INT1 for backwards compatibility. */
> + st->int_map_reg = ADXL367_REG_INT1_MAP;
> + return 0;
> +}
> +
> int adxl367_probe(struct device *dev, const struct adxl367_ops *ops,
> void *context, struct regmap *regmap, int irq)
> {
> @@ -1482,6 +1511,10 @@ int adxl367_probe(struct device *dev, const struct adxl367_ops *ops,
> if (ret)
> return ret;
>
> + ret = adxl367_set_int_map_reg(st);
> + if (ret)
> + return dev_err_probe(st->dev, ret, "Failed to get interrupt\n");
> +
> ret = devm_request_threaded_irq(st->dev, irq, NULL,
> adxl367_irq_handler, IRQF_ONESHOT,
> indio_dev->name, indio_dev);
prev parent reply other threads:[~2026-08-16 0:39 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-13 8:14 [PATCH v2 0/3] iio: accel: adxl367: add INT2 interrupt pin support Antoniu Miclaus
2026-08-13 8:14 ` [PATCH v2 1/3] iio: accel: adxl367: update maintainer entries Antoniu Miclaus
2026-08-14 9:23 ` Krzysztof Kozlowski
2026-08-14 12:28 ` Nuno Sá
2026-08-13 8:14 ` [PATCH v2 2/3] dt-bindings: iio: accel: adi,adxl367: add interrupt-names Antoniu Miclaus
2026-08-13 8:14 ` [PATCH v2 3/3] iio: accel: adxl367: add support for INT2 interrupt pin Antoniu Miclaus
2026-08-13 8:28 ` sashiko-bot
2026-08-14 12:28 ` Nuno Sá
2026-08-16 0:49 ` Jonathan Cameron
2026-08-16 0:39 ` Jonathan Cameron [this message]
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