From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 383793E3C50; Sun, 16 Aug 2026 21:39:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786916397; cv=none; b=hVySjjehlvqx+5CLMfYll8mubJ26j/DkWMz1uEsPoxk0DcQoLalPru8qEmiKfadlAkTmjnLcUx99QD8yhB/rvYHOHCGt0+DlFGL8xUqtIdVIyoiysZbhiJMcqlTQjPdr95duz5jH083VniVUO4jOAWig2DLLrmfq63VPaBO8xVk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786916397; c=relaxed/simple; bh=nSMULccsVQDlqWBEw/JvR50MCcLLOVuTQxDQb6Hi2YA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OIBe7w/jIyvADHCOWBeu9ngaRv7FjMYJSqbp67fO9qVI7Q2s+mUOPn/VRlRByBbz1vUcPxIiIancVoCrby2eUbm+FgtwJwzSdRzx3mYCaV0fayx29unlPvpxyRTt4Q1Iu12E56JUSmJJxZNHpXiUYKhZDJebAKj6blFQefJCi+o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com; spf=pass smtp.mailfrom=nabladev.com; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b=Gm/m/cKB; arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="Gm/m/cKB" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 50D1711C1F5; Sun, 16 Aug 2026 23:39:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1786916389; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=C5dxW+LVwtKWFFmccbVivDDq2h7Iz5VikpIl0zxDNug=; b=Gm/m/cKBnnCbegZ+pXC3JxlFGgSI4uQg2kbJLhQUY0idXSJ9eHkzjOZHOqQ81MULLQg+js Uj178wM3p7mJVDas+yFwKEoMu6JhTbgD+4Xz1fhm5NYxvnpXqa2HpYgMFcmS6ON8Nrttqx W2LVox33jitkp4vCaNGKn/W8Qebd8ZatohKaIz1kdNifdqy6WdhRdM7zE5Mx1NtI5VtbhN 2IWGyxusv2dzbE54xKAMrpR1OuVSW4VBhvJfzKNCq+dv98ZhAJaMFx8yIy1dHwJduOJ4vi gpcvuWSu8C8zPmMjIkCGDLlBConLOtqoMMB0cSpfsZh1zx+f9wglUuaL+oiDpw== From: Marek Vasut To: linux-usb@vger.kernel.org Cc: Pankaj Dev , Marek Vasut , Alexandre Torgue , Christian Bruel , Conor Dooley , Fabrice Gasnier , Greg Kroah-Hartman , Krzysztof Kozlowski , Maxime Coquelin , Neil Armstrong , Rahul Kumar , Rob Herring , Rosen Penev , Thinh Nguyen , Vinod Koul , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 9/9] arm64: dts: st: Add USB nodes on stm32mp251 Date: Sun, 16 Aug 2026 23:37:11 +0200 Message-ID: <20260816213849.1044073-10-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260816213849.1044073-1-marex@nabladev.com> References: <20260816213849.1044073-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 From: Pankaj Dev Add USB controller and PHY nodes to stm32mp251 DT. This includes two USB 2.0 FEMTO PHYs, USB 2.0 host controller and DWC3 DRD controller nodes. Co-developed-by: Pankaj Dev Signed-off-by: Pankaj Dev Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Christian Bruel Cc: Conor Dooley Cc: Fabrice Gasnier Cc: Greg Kroah-Hartman Cc: Krzysztof Kozlowski Cc: Maxime Coquelin Cc: Neil Armstrong Cc: Pankaj Dev Cc: Rahul Kumar Cc: Rob Herring Cc: Rosen Penev Cc: Thinh Nguyen Cc: Vinod Koul Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-usb@vger.kernel.org --- V2: - Fix up Sob/Cdb lines - Move PHY into syscfg subnode - Turn st,stm32mp25-syscfg into simple-mfd - Use clock-cells = <1> to discern OSC and future PLL clock from the PHY --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 65 +++++++++++++++++++++++++- 1 file changed, 64 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 6e985f115b195..6b147ed0fd550 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1746,6 +1746,47 @@ stmmac_axi_config_1: stmmac-axi-config { }; }; + usbh_ohci: usb@482e0000 { + compatible = "generic-ohci"; + reg = <0x482e0000 0x1000>; + access-controllers = <&rifsc 63>; + clocks = <&usb2_phy1 0>, <&rcc CK_BUS_USB2OHCI>; + interrupts = ; + phys = <&usb2_phy1>; + phy-names = "usb"; + resets = <&rcc USBH_R>; + status = "disabled"; + }; + + usbh_ehci: usb@482f0000 { + compatible = "generic-ehci"; + reg = <0x482f0000 0x1000>; + access-controllers = <&rifsc 63>; + clocks = <&usb2_phy1 0>, <&rcc CK_BUS_USB2EHCI>; + companion = <&usbh_ohci>; + interrupts = ; + phys = <&usb2_phy1>; + phy-names = "usb"; + resets = <&rcc USBH_R>; + status = "disabled"; + }; + + usb3dr: usb@48300000 { + compatible = "st,stm32mp25-dwc3"; + reg = <0x48300000 0x100000>; + access-controllers = <&rifsc 66>; + clocks = <&rcc CK_KER_USB2PHY2>, + <&rcc CK_BUS_USB3DR>, + <&rcc CK_KER_USB2PHY2>; + clock-names = "ref", "bus_early", "suspend"; + interrupts = ; + phys = <&usb2_phy2>, <&combophy PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + resets = <&rcc USB3DR_R>; + st,syscfg = <&syscfg 0x4800>; + status = "disabled"; + }; + pcie_ep: pcie-ep@48400000 { compatible = "st,stm32mp25-pcie-ep"; reg = <0x48400000 0x100000>, @@ -2002,9 +2043,31 @@ exti1: interrupt-controller@44220000 { }; syscfg: syscon@44230000 { - compatible = "st,stm32mp25-syscfg", "syscon"; + compatible = "st,stm32mp25-syscfg", "syscon", "simple-mfd"; reg = <0x44230000 0x10000>; #clock-cells = <0>; + #address-cells = <1>; + #size-cells = <1>; + + usb2_phy1: phy@2400 { + compatible = "st,stm32mp25-usb2phy1"; + reg = <0x2400 0x24>; + #phy-cells = <0>; + #clock-cells = <1>; + clocks = <&rcc CK_KER_USB2PHY1>; + resets = <&rcc USB2PHY1_R>; + status = "disabled"; + }; + + usb2_phy2: phy@2800 { + compatible = "st,stm32mp25-usb2phy2"; + reg = <0x2800 0xc>; + #phy-cells = <0>; + #clock-cells = <1>; + clocks = <&rcc CK_KER_USB2PHY2EN>; + resets = <&rcc USB2PHY2_R>; + status = "disabled"; + }; }; pinctrl: pinctrl@44240000 { -- 2.53.0