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Tue, 18 Aug 2026 11:00:01 -0700 (PDT) Received: from [10.90.163.252] ([2409:40c2:5018:73b0:1ca9:66ac:f2de:44bc]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14152ea340csm17817135c88.0.2026.08.18.10.59.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Aug 2026 11:00:00 -0700 (PDT) From: Bhargav Joshi Date: Tue, 18 Aug 2026 23:29:51 +0530 Subject: [PATCH] dt-bindings: arm: ti,omap-mpu: Convert to DT schema Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260818-ti-mpu-v1-1-5b1c71a34669@gmail.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/yXM0QpAMBTG8VfRubaykxivIhdsB0cZbUgt7264/ NX/+wJ4ckwe6iSAo5M9rzZCpgnoqbMjCTbRgBkWmZJK7CyW7RCIKCszGCpzhBhvjga+vqOm/e2 Pfia9v2u47we+t2l/agAAAA== X-Change-ID: 20260818-ti-mpu-22219dfde742 To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Benoit Cousson Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, goledhruva@gmail.com, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com, j.bhargav.u@gmail.com X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787075995; l=4094; i=j.bhargav.u@gmail.com; h=from:subject:message-id; bh=XeGxqg1KAnPvmIFhlK5QldIE5Ykscd6BBFWDmaQWQPc=; b=pK62g2fpBm3Hm6UuEU50s0mV8IelXT1tguuTCjsbX7XtGF7aRVF+Eyzfn7JqZOlojVa3PvIDk 513nxpxDId/C0hObWWduEaNZ8ROGTHAUPoylwsgrCffI1pgVtW63wgi X-Developer-Key: i=j.bhargav.u@gmail.com; a=ed25519; pk=IqNDwUZKECEA+n8wXctFLBbYL9NhFstZNbOznm/nX1k= Convert TI OMAP Main Processor Unit MPU text to DT schema. Changes from the original text binding during conversion: - Mark ti,hwmods as deprecated, as it is longer needed. - The pm-sram property name is kept as-is without a vendor prefix ti,pm-sram to maintain backward compatibility with older device trees and the existing pm33xx driver. Signed-off-by: Bhargav Joshi --- Documentation/devicetree/bindings/arm/omap/mpu.txt | 54 -------------------- .../devicetree/bindings/arm/ti/ti,omap-mpu.yaml | 58 ++++++++++++++++++++++ 2 files changed, 58 insertions(+), 54 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt deleted file mode 100644 index e41490e6979c..000000000000 --- a/Documentation/devicetree/bindings/arm/omap/mpu.txt +++ /dev/null @@ -1,54 +0,0 @@ -* TI - MPU (Main Processor Unit) subsystem - -The MPU subsystem contain one or several ARM cores -depending of the version. -The MPU contain CPUs, GIC, L2 cache and a local PRCM. - -Required properties: -- compatible : Should be "ti,omap3-mpu" for OMAP3 - Should be "ti,omap4-mpu" for OMAP4 - Should be "ti,omap5-mpu" for OMAP5 -- ti,hwmods: "mpu" - -Optional properties: -- sram: Phandle to the ocmcram node - -am335x and am437x only: -- pm-sram: Phandles to ocmcram nodes to be used for power management. - First should be type 'protect-exec' for the driver to use to copy - and run PM functions, second should be regular pool to be used for - data region for code. See Documentation/devicetree/bindings/sram/sram.yaml - for more details. - -Examples: - -- For an OMAP5 SMP system: - -mpu { - compatible = "ti,omap5-mpu"; - ti,hwmods = "mpu" -}; - -- For an OMAP4 SMP system: - -mpu { - compatible = "ti,omap4-mpu"; - ti,hwmods = "mpu"; -}; - - -- For an OMAP3 monocore system: - -mpu { - compatible = "ti,omap3-mpu"; - ti,hwmods = "mpu"; -}; - -- For an AM335x system: - -mpu { - compatible = "ti,omap3-mpu"; - ti,hwmods = "mpu"; - pm-sram = <&pm_sram_code - &pm_sram_data>; -}; diff --git a/Documentation/devicetree/bindings/arm/ti/ti,omap-mpu.yaml b/Documentation/devicetree/bindings/arm/ti/ti,omap-mpu.yaml new file mode 100644 index 000000000000..abd8c64e8e9f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/ti,omap-mpu.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/ti,omap-mpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI MPU (Main Processor Unit) subsystem + +maintainers: + - Benoit Cousson + +description: + The MPU subsystem contains one or several ARM cores depending on the version. + The MPU contains CPUs, GIC, L2 cache and a local PRCM. + +properties: + compatible: + enum: + - ti,omap3-mpu + - ti,omap4-mpu + - ti,omap5-mpu + + ti,hwmods: + $ref: /schemas/types.yaml#/definitions/string + description: Name of the hwmod associated with the MPU + const: mpu + deprecated: true + + sram: + description: ocmcram node + + pm-sram: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: ocmcram nodes for power management. For am335x and am437x. + items: + - items: + - description: ocmcram node of type protect-exec for PM functions + - items: + - description: ocmcram node of regular pool to be used for data region + +required: + - compatible + +additionalProperties: false + +examples: + - | + mpu { + compatible = "ti,omap5-mpu"; + ti,hwmods = "mpu"; + }; + + - | + mpu { + compatible = "ti,omap3-mpu"; + ti,hwmods = "mpu"; + pm-sram = <&pm_sram_code &pm_sram_data>; + }; --- base-commit: 0f23d56f17fdfc7db69d51f64c8b91bbab947aa9 change-id: 20260818-ti-mpu-22219dfde742 Best regards, -- Bhargav