From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout-p-201.mailbox.org (mout-p-201.mailbox.org [80.241.56.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB1A538AC68; Wed, 19 Aug 2026 05:01:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787115684; cv=none; b=fVjciCNkLhxueqmRudAGes+eow0k+I6GuEI8D2KwiFrFpO2fghRar0Xy64u6ys5jWnE759dZPe8AuwZeuSo6VyV+tk1ogAa8i3uaHiEgmZ+Yxk0l7g6qhqG12tr2GZvi0CTePuv2A9XFDNrsIH5j6mozN3SaBXxmYaK9TvPikGI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787115684; c=relaxed/simple; bh=CAKpm6rmVqOqKWRzXe3ZmgkbPHOVGzJrGvnL46DVhpM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=B0+NwOTuX2+UjBStN56f7sc5HJS8Yg2xU92O7kXTx45fdt7myJ9jQyJea6lxJtkjLiLILXzcPT8aU1CUjJ0UcOpPsULAVpGE/xy8YsdYArRLn/fsWKNMjBFq4032slE6aeyB0Gea+rFBS2akhIlu4BpzFiuwZ37G/ovQDKlo3t8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=NhrOlL2F; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=UfmVh1m9; arc=none smtp.client-ip=80.241.56.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="NhrOlL2F"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="UfmVh1m9" Received: from smtp102.mailbox.org (smtp102.mailbox.org [IPv6:2001:67c:2050:b231:465::102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-201.mailbox.org (Postfix) with ESMTPS id 4hPvYD4tTYzMlH7; Wed, 19 Aug 2026 07:01:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1787115680; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+00rveaFA8u8Fy7XodDbVmJUDIIjxe3qDtgo5Q2f9CM=; b=NhrOlL2Fi9SIsQYwH1pMsVzsDc9LBHK+2BJHjbxxcip4AhKNjPAkHzyovHaIrpegzOnv7a cTPW4NgVK0qvGiJlxIPJqwYaofcFsxc80SvJnJj829bEHAjGM2NwVoLALDXe705vHr2aL0 2O5GGAjaOp2GO+KCkUTHHy8JCJ7U2P0U78NDY+RXgYDZ3ed633mxgIo8PtUWRAlx2YR9tR ozB6y40N1Z6yOZdHLNcebNSeV5Q7iE3D5HZlLIQRxL3XkaEje5Hfq4f1kcBELQ7fJrvJsU 25MbVNpHcOO7X34rHia35vp4tnv7Q/KY99GwXQFt5NRBAzbuFHNfainQGEsFWQ== Authentication-Results: outgoing_mbo_mout; dkim=pass header.d=mailbox.org header.s=mail20150812 header.b=UfmVh1m9; spf=pass (outgoing_mbo_mout: domain of marek.vasut+renesas@mailbox.org designates 2001:67c:2050:b231:465::102 as permitted sender) smtp.mailfrom=marek.vasut+renesas@mailbox.org From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1787115678; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+00rveaFA8u8Fy7XodDbVmJUDIIjxe3qDtgo5Q2f9CM=; b=UfmVh1m94pLwjxcOOocRcBmSI9jRfHGIwkCnSsuCeOz4ed2u5LLL2sM6ZDVMHTf99ouySX sff1cuuFkqyoHDwpmQCgwmg3q4Yc/S11+qk4Ag+6GwlnmyCLzLQAK/pXpiylokGlDdgV+f 0avrYD2qE2KIS7kRTJmiyA89SBIA7ayTdhoLda6WcxqgfAAuTofo+RjWH57EEE4vOiR8cf Xq1x//wEcrHs1uxCb2KcvtPkElJd2obSDWEVIdDnoKHmxsleg5rjVOZpdkyIX8+Ibgtk4a u7UfvKt2+8teDjFoC4V67tCheyL9VWpT2EwPqnIJ9DwF4hj+vyJgYrNNjO05Jg== To: linux-usb@vger.kernel.org Cc: Thanh Quan , Marek Vasut , Conor Dooley , Geert Uytterhoeven , Greg Kroah-Hartman , Krzysztof Kozlowski , Rob Herring , Thinh Nguyen , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v4 2/2] usb: dwc3: dwc3-generic-plat: Add Renesas R-Car Gen5 DWC3 xHCI USB controller glue Date: Wed, 19 Aug 2026 07:00:52 +0200 Message-ID: <20260819050109.681890-2-marek.vasut+renesas@mailbox.org> In-Reply-To: <20260819050109.681890-1-marek.vasut+renesas@mailbox.org> References: <20260819050109.681890-1-marek.vasut+renesas@mailbox.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-MBO-RS-ID: 45dbe6c277725c11685 X-MBO-RS-META: 8eh39ttggm169nx8bj3phkcpqppd7toc X-Rspamd-Queue-Id: 4hPvYD4tTYzMlH7 From: Thanh Quan The Renesas R-Car Gen5 SoC contains multiple instances of DWC3 USB controller with glue logic wrapper around them. Extend the generic DWC3 platform driver with Renesas R-Car Gen5 glue logic specifics. Signed-off-by: Thanh Quan Co-developed-by: Marek Vasut Signed-off-by: Marek Vasut --- Cc: Conor Dooley Cc: Geert Uytterhoeven Cc: Greg Kroah-Hartman Cc: Krzysztof Kozlowski Cc: Rob Herring Cc: Thinh Nguyen Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-usb@vger.kernel.org --- V2: Extend dwc3-generic-plat driver instead V3: Handle maximum-speed as optional property, test for USB 3 PHY non-presence to determine whether the controller is USB 2 only, consider optional maximum-speed DT property, but if it is missing then default to maximum controller capabilities based on the presence of PHY phandles. V4: No change --- drivers/usb/dwc3/dwc3-generic-plat.c | 60 ++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-generic-plat.c b/drivers/usb/dwc3/dwc3-generic-plat.c index ca69ac0eb07ce..dec89b068291a 100644 --- a/drivers/usb/dwc3/dwc3-generic-plat.c +++ b/drivers/usb/dwc3/dwc3-generic-plat.c @@ -71,6 +71,60 @@ static int dwc3_eic7700_init(struct dwc3_generic *dwc3g) return 0; } +static int dwc3_renesas_rcar_gen5_init(struct dwc3_generic *dwc3g) +{ + struct device *dev = dwc3g->dev; + struct platform_device *pdev = to_platform_device(dev); + enum usb_device_speed speed = usb_get_maximum_speed(dev); + bool usb2only = false; + void __iomem *glue; + + /* Wireless USB is not supported */ + if (speed == USB_SPEED_WIRELESS) + return dev_err_probe(dev, -EINVAL, "Wireless USB not supported\n"); + + /* No USB 3 PHY in DT means this is surely USB 2 controller */ + if (device_property_match_string(dev, "phy-names", "usb3-phy") < 0) + usb2only = true; + + /* + * Controller can be limited to USB 2 via optional maximum-speed DT + * property. If the DT property is not present, default to maximum + * controller capabilities. + */ + if (speed >= USB_SPEED_LOW && speed <= USB_SPEED_HIGH) + usb2only = true; + + glue = devm_platform_ioremap_resource_byname(pdev, "glue"); + if (IS_ERR(glue)) + return PTR_ERR(glue); + + /* + * The datasheet describes initialization procedure without full + * information about the registers. Therefore, the source code is + * based on the bare metal code shared by the board team. + */ + writew(0x211, glue + 0x26); + + /* USB2 does need additional register programming. */ + if (!usb2only) + return 0; + + writew(0x11, glue + 0x81c); + writew(0x0, glue + 0x81a); + writew(0x1, glue + 0x802); + + usleep_range(10000, 20000); + + writew(0x0, glue + 0x802); + writew(0x1, glue + 0x2a); + writew(0x1, glue + 0x81a); + + usleep_range(10000, 20000); + + return 0; +} + static int dwc3_spacemit_k1_init(struct dwc3_generic *dwc3g) { struct device *dev = dwc3g->dev; @@ -231,11 +285,17 @@ static const struct dwc3_generic_config eic7700_dwc3 = { .properties = DWC3_DEFAULT_PROPERTIES, }; +static const struct dwc3_generic_config renesas_rcar_gen5_dwc3 = { + .init = dwc3_renesas_rcar_gen5_init, + .properties = DWC3_DEFAULT_PROPERTIES, +}; + static const struct of_device_id dwc3_generic_of_match[] = { { .compatible = "spacemit,k1-dwc3", &spacemit_k1_dwc3}, { .compatible = "spacemit,k3-dwc3", }, { .compatible = "fsl,ls1028a-dwc3", &fsl_ls1028_dwc3}, { .compatible = "eswin,eic7700-dwc3", &eic7700_dwc3}, + { .compatible = "renesas,rcar-gen5-dwc3", &renesas_rcar_gen5_dwc3}, { .compatible = "starfive,jhb100-dwc3", }, { /* sentinel */ } }; -- 2.53.0