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Wed, 19 Aug 2026 02:32:17 -0700 (PDT) Received: from lin-0772.qualcomm.com ([212.136.9.4]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482b14b8050sm4402835f8f.19.2026.08.19.02.32.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 02:32:16 -0700 (PDT) From: Atanas Filipov To: Georgi Djakov , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov , Gjorgji Rosikopulos Subject: [PATCH v2 1/3] dt-bindings: interconnect: Add Qualcomm CAMNOC ICC binding Date: Wed, 19 Aug 2026 12:32:09 +0300 Message-Id: <20260819093211.1436275-2-atanas.filipov@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260819093211.1436275-1-atanas.filipov@oss.qualcomm.com> References: <20260819093211.1436275-1-atanas.filipov@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: OEAWRTCTYqG0MTp5bVVhvysmnam9U0W7 X-Proofpoint-Spam-Info: AW1haW4tMjYwODE5MDA3MiBTYWx0ZWRfX1qlApCPCE97T nshTm8jIZUeIn3pahiv/5Qd8/a1fcYzNvv/OvJyz1L+EwIBINYqxNrd4mdSB0T8fX2QS4VVNoy8 0prL1jPN2tM2Xzk0WXFb6qlRl/H6op8= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE5MDA3MiBTYWx0ZWRfX90e/MkQzYDe8 m3tMQALOCN7KxgupiYggesZ2uj1NFB6nbYTgYqdCC7aknsVLsxijiLxxLdVC85ecxN6gV446mek lMuXqEO47gaehA5lqQg1NTr8hjhvQvrZDrL1OznmSDYvWEtUbtRchitnMiUYl11uBLJVMzCZAtH hqmRYXfSXUIBMZqHNASkZOTk38PX7b7SXIPY54ojUWifwoe7Ywx6fNVzYupnfz7D+saBEdRXmTN 1KF5pLN+Qd+C2jFXFbj6W24geshITDm8cIQtRXpO6aXBdZbXO9zSxKDCLv20RIIhPLBLtQgLRWR L9ecKZp462fLTUM7MeCD0GHcs/uYpfNLTzoNe7q4lBRU2WgWqwtKxW4vJSONz37vF9OfPPV4wcv H8gx5k/AsZ6MYI5VkouJqezBG/WBL7TgLC5yKFZcksU3RqMgtMWnYY8qHkGx1gya+TodeltcyK0 WwKLi68K+Y5CM0ejtpg== X-Authority-Analysis: v=2.4 cv=aNrAb79m c=1 sm=1 tr=0 ts=6a857822 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=dNlqnMcrdpbb+gQrTujlOQ==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=Tj7GrrDxcBg27RxCkVIA:9 a=uxP6HrT_eTzRwkO_Te1X:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-GUID: OEAWRTCTYqG0MTp5bVVhvysmnam9U0W7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-19_02,2026-08-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608190072 Add binding for the Qualcomm CAMNOC interconnect provider. CAMNOC is the internal AXI interconnect within the camera subsystem. Multiple sub-devices share CAM_CC_CAMNOC_AXI_CLK; the ICC provider aggregates their bandwidth votes and scales the clock accordingly, avoiding the last-writer-wins race from direct clk_set_rate() calls. Signed-off-by: Atanas Filipov --- .../bindings/interconnect/qcom,camnoc.yaml | 124 ++++++++++++++++++ .../dt-bindings/interconnect/qcom,camnoc.h | 52 ++++++++ 2 files changed, 176 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml create mode 100644 include/dt-bindings/interconnect/qcom,camnoc.h diff --git a/Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml b/Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml new file mode 100644 index 000000000000..b2659db2cf27 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,camnoc.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,camnoc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Camera NOC (CAMNOC) Interconnect Provider + +maintainers: + - Atanas Filipov + +description: + The Camera Network-on-Chip (CAMNOC) is the internal AXI interconnect + within the Qualcomm camera subsystem. It arbitrates AXI bandwidth + between camera sub-devices (IFE, JPEG, BPS, IPE, etc.) and the external + memory interconnect. Multiple consumers may independently request + bandwidth via icc_set_bw(); the CAMNOC ICC provider aggregates all active + votes and scales CAM_CC_CAMNOC_AXI_CLK accordingly, avoiding the + last-writer-wins race that arises when each consumer calls clk_set_rate() + directly on the shared clock. + + Each camera sub-device driver that shares the CAMNOC AXI clock should + obtain an ICC path from its master port to SLAVE_CAMNOC_AXI and vote for + bandwidth using the port IDs defined in + include/dt-bindings/interconnect/qcom,camnoc.h. + +properties: + compatible: + enum: + - qcom,sm8250-cam-virt + + clocks: + items: + - description: CAMNOC AXI clock + + clock-names: + items: + - const: camnoc_axi + + '#interconnect-cells': + const: 1 + +required: + - compatible + - clocks + - clock-names + - '#interconnect-cells' + +additionalProperties: false + +examples: + - | + #include + #include + + /* CAMNOC ICC provider node */ + cam_virt: interconnect-cam-virt { + compatible = "qcom,sm8250-cam-virt"; + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>; + clock-names = "camnoc_axi"; + #interconnect-cells = <1>; + }; + + /* + * Simple consumer example: IFE sub-device voting for CAMNOC bandwidth + * directly via icc_set_bw(). + */ + camera-ife@0 { + reg = <0x0 0x1000>; + + interconnects = <&cam_virt MASTER_CAMNOC_IFE_0 + &cam_virt SLAVE_CAMNOC_AXI>; + interconnect-names = "camnoc"; + }; + + /* + * OPP-based consumer example: JPEG encoder driving its CAMNOC bandwidth + * vote from the same OPP entry that selects its core clock rate and + * RPMh performance state. opp-peak-kBps is the minimum CAMNOC bandwidth + * required at each operating point; the actual value depends on the + * target resolution and quality settings. + * + * opp-hz refers to the JPEG dedicated core clock rate. All shared + * clocks (e.g. CAMNOC AXI) are managed by the ICC framework so that + * votes from multiple consumers are aggregated before the rate is + * applied to the hardware. + */ + camera-jpeg@ac53000 { + reg = <0x0ac53000 0x1000>; + + interconnects = <&cam_virt MASTER_CAMNOC_JPEG + &cam_virt SLAVE_CAMNOC_AXI>; + interconnect-names = "camnoc"; + + operating-points-v2 = <&jpeg_opp_table>; + + jpeg_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-peak-kBps = <22246>; + required-opps = <&rpmhpd_opp_min_svs>; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-peak-kBps = <44492>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-peak-kBps = <88983>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-peak-kBps = <106780>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; diff --git a/include/dt-bindings/interconnect/qcom,camnoc.h b/include/dt-bindings/interconnect/qcom,camnoc.h new file mode 100644 index 000000000000..9b6468f852ec --- /dev/null +++ b/include/dt-bindings/interconnect/qcom,camnoc.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_CAMNOC_H +#define __DT_BINDINGS_INTERCONNECT_QCOM_CAMNOC_H + +/* + * CAMNOC master port IDs for SM8250 (Kona). + * Each ID identifies a camera sub-device that can vote for CAMNOC AXI + * bandwidth via icc_set_bw(). Only ports wired on this SoC are listed. + */ + +/* Image Front End */ +#define MASTER_CAMNOC_IFE_0 0 +#define MASTER_CAMNOC_IFE_0_RDI 1 +#define MASTER_CAMNOC_IFE_1 2 +#define MASTER_CAMNOC_IFE_1_RDI 3 +#define MASTER_CAMNOC_IFE_LITE_0 4 +#define MASTER_CAMNOC_IFE_LITE_1 5 +#define MASTER_CAMNOC_IFE_LITE_2 6 +#define MASTER_CAMNOC_IFE_LITE_3 7 +#define MASTER_CAMNOC_IFE_LITE_4 8 + +/* Bayer Processing Segment */ +#define MASTER_CAMNOC_BPS 9 + +/* Image Processing Engine */ +#define MASTER_CAMNOC_IPE_0 10 +#define MASTER_CAMNOC_IPE_1 11 + +/* JPEG encoder and DMA */ +#define MASTER_CAMNOC_JPEG 12 +#define MASTER_CAMNOC_JPEG_DMA 13 + +/* Camera Data Mover */ +#define MASTER_CAMNOC_CDM 14 + +/* Face Detection */ +#define MASTER_CAMNOC_FD 15 + +/* Sensor Bayer Interface */ +#define MASTER_CAMNOC_SBI 16 + +/* Image Control Processor */ +#define MASTER_CAMNOC_ICP 17 + +/* CAMNOC AXI slave (single exit point to external interconnect) */ +#define SLAVE_CAMNOC_AXI 18 + +#endif /* __DT_BINDINGS_INTERCONNECT_QCOM_CAMNOC_H */ -- 2.34.1