From: Luca Leonardo Scorcia <l.scorcia@gmail.com>
To: linux-mediatek@lists.infradead.org
Cc: Luca Leonardo Scorcia <l.scorcia@gmail.com>,
Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 4/7] dt-bindings: watchdog: Add compatible for MediaTek mt8167
Date: Wed, 19 Aug 2026 12:16:25 +0200 [thread overview]
Message-ID: <20260819101853.44681-5-l.scorcia@gmail.com> (raw)
In-Reply-To: <20260819101853.44681-1-l.scorcia@gmail.com>
Currently mt8167 inherits its watchdog from the included mt8516 dtsi,
which in turn falls back on mt6589-wdt. However according to the data
sheet mt8167 toprgu is not actually compatible with mt6589: the latter
has 12 contiguous toprgu reset bits while the former has 14 non-contiguous
toprgu reset bits.
Update the mtk-wdt binding to add a dedicated compatible for mt8167 and
add the IDs that can be used in device trees to identify toprgu and mmsys
subsystem resets.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
---
.../bindings/watchdog/mediatek,mtk-wdt.yaml | 1 +
.../dt-bindings/reset/mediatek,mt8167-mmsys.h | 35 +++++++++++++++++++
.../dt-bindings/reset/mediatek,mt8167-wdt.h | 21 +++++++++++
3 files changed, 57 insertions(+)
create mode 100644 include/dt-bindings/reset/mediatek,mt8167-mmsys.h
create mode 100644 include/dt-bindings/reset/mediatek,mt8167-wdt.h
diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
index 953629cb9558..f514be8a5851 100644
--- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
@@ -26,6 +26,7 @@ properties:
- mediatek,mt6795-wdt
- mediatek,mt7986-wdt
- mediatek,mt7988-wdt
+ - mediatek,mt8167-wdt
- mediatek,mt8183-wdt
- mediatek,mt8186-wdt
- mediatek,mt8188-wdt
diff --git a/include/dt-bindings/reset/mediatek,mt8167-mmsys.h b/include/dt-bindings/reset/mediatek,mt8167-mmsys.h
new file mode 100644
index 000000000000..b21f67b3b55c
--- /dev/null
+++ b/include/dt-bindings/reset/mediatek,mt8167-mmsys.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
+#ifndef _DT_BINDINGS_RESET_MEDIATEK_MT8167_MMSYS_H_
+#define _DT_BINDINGS_RESET_MEDIATEK_MT8167_MMSYS_H_
+
+/* MMSYS reset IDs */
+#define MT8167_MMSYS_SW0_RST_B_SMI_COMMON 0
+#define MT8167_MMSYS_SW0_RST_B_SMI_LARB0 1
+#define MT8167_MMSYS_SW0_RST_B_CAM_MDP 2
+#define MT8167_MMSYS_SW0_RST_B_MDP_RDMA0 3
+#define MT8167_MMSYS_SW0_RST_B_MDP_RSZ0 4
+#define MT8167_MMSYS_SW0_RST_B_MDP_RSZ1 5
+#define MT8167_MMSYS_SW0_RST_B_MDP_TDSHP0 6
+#define MT8167_MMSYS_SW0_RST_B_MDP_WDMA 7
+#define MT8167_MMSYS_SW0_RST_B_MDP_WROT0 8
+#define MT8167_MMSYS_SW0_RST_B_FAKE_ENG 9
+#define MT8167_MMSYS_SW0_RST_B_MUTEX 10
+#define MT8167_MMSYS_SW0_RST_B_DISP_OVL0 11
+#define MT8167_MMSYS_SW0_RST_B_DISP_RDMA0 12
+#define MT8167_MMSYS_SW0_RST_B_DISP_RDMA1 13
+#define MT8167_MMSYS_SW0_RST_B_DISP_WDMA0 14
+#define MT8167_MMSYS_SW0_RST_B_DISP_COLOR 15
+#define MT8167_MMSYS_SW0_RST_B_DISP_CCORR 16
+#define MT8167_MMSYS_SW0_RST_B_DISP_AAL 17
+#define MT8167_MMSYS_SW0_RST_B_DISP_GAMMA 18
+#define MT8167_MMSYS_SW0_RST_B_DISP_DITHER 19
+#define MT8167_MMSYS_SW0_RST_B_DISP_UFOE 20
+#define MT8167_MMSYS_SW0_RST_B_DISP_PWM 21
+#define MT8167_MMSYS_SW0_RST_B_DSI0 22
+#define MT8167_MMSYS_SW0_RST_B_DPI0 23
+#define MT8167_MMSYS_SW0_RST_B_MIPI_TX_CONFIG 24
+#define MT8167_MMSYS_SW1_RST_B_LVDS_ENCODER 25
+#define MT8167_MMSYS_SW1_RST_B_DPI1 26
+#define MT8167_MMSYS_SW1_RST_B_HDMI 27
+
+#endif /* _DT_BINDINGS_RESET_MEDIATEK_MT8167_MMSYS_H_ */
diff --git a/include/dt-bindings/reset/mediatek,mt8167-wdt.h b/include/dt-bindings/reset/mediatek,mt8167-wdt.h
new file mode 100644
index 000000000000..1a24bfe079ca
--- /dev/null
+++ b/include/dt-bindings/reset/mediatek,mt8167-wdt.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
+#ifndef _DT_BINDINGS_RESET_MEDIATEK_MT8167_WDT_H_
+#define _DT_BINDINGS_RESET_MEDIATEK_MT8167_WDT_H_
+
+/* TOPRGU reset IDs */
+#define MT8167_TOPRGU_DDRPHY_FLASH_RST 0
+#define MT8167_TOPRGU_AUD_PAD_RST 1
+#define MT8167_TOPRGU_MM_RST 2
+#define MT8167_TOPRGU_MFG_RST 3
+#define MT8167_TOPRGU_MDSYS_RST 4
+#define MT8167_TOPRGU_CONN_RST 5
+#define MT8167_TOPRGU_PAD2CAM_DIG_MIPI_RX_RST 6
+#define MT8167_TOPRGU_DIG_MIPI_TX_RST 7
+#define MT8167_TOPRGU_SPI_PAD_MACRO_RST 8
+#define MT8167_TOPRGU_APMIXED_RST 9
+#define MT8167_TOPRGU_VDEC_RST 10
+#define MT8167_TOPRGU_CONN_MCU_RST 11
+#define MT8167_TOPRGU_EFUSE_RST 12
+#define MT8167_TOPRGU_PWRAP_SPICTL_RST 13
+
+#endif /* _DT_BINDINGS_RESET_MEDIATEK_MT8167_WDT_H_ */
--
2.43.0
next prev parent reply other threads:[~2026-08-19 10:19 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-19 10:16 [PATCH v4 0/7] Properly describe mt6589 and mt8167 toprgu resets Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 1/7] dt-bindings: reset: Add mt6589 toprgu reset IDs Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 2/7] watchdog: mediatek: Add wdt/toprgu resets for mt6589 Luca Leonardo Scorcia
2026-08-19 10:30 ` sashiko-bot
2026-08-19 10:16 ` [PATCH v4 3/7] arm: dts: mediatek: mt6589: Enable toprgu reset controller Luca Leonardo Scorcia
2026-08-19 10:16 ` Luca Leonardo Scorcia [this message]
2026-08-19 10:29 ` [PATCH v4 4/7] dt-bindings: watchdog: Add compatible for MediaTek mt8167 sashiko-bot
2026-08-19 10:16 ` [PATCH v4 5/7] watchdog: mediatek: Add support for mt8167 toprgu/watchdog Luca Leonardo Scorcia
2026-08-19 10:29 ` sashiko-bot
2026-08-19 10:16 ` [PATCH v4 6/7] soc: mediatek: mtk-mmsys: Add resets for mt8167 Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 7/7] arm64: dts: mt8167: Properly describe the SoC watchdog and mmsys resets Luca Leonardo Scorcia
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