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Sun, 23 Aug 2026 12:48:04 -0700 (PDT) X-Received: by 2002:a05:6a20:ce4c:b0:3c4:42d9:58e3 with SMTP id adf61e73a8af0-3cd4bc358a4mr25216799637.13.1787514484043; Sun, 23 Aug 2026 12:48:04 -0700 (PDT) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-327f925190fsm32321623eec.31.2026.08.23.12.47.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Aug 2026 12:48:03 -0700 (PDT) From: Abhinaba Rakshit Date: Mon, 24 Aug 2026 01:17:40 +0530 Subject: [PATCH v12 3/6] mmc: sdhci-msm: Set ICE clk to TURBO at sdhci ICE init Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260824-enable-ice-clock-scaling-v12-3-09271f583dc6@oss.qualcomm.com> References: <20260824-enable-ice-clock-scaling-v12-0-09271f583dc6@oss.qualcomm.com> In-Reply-To: <20260824-enable-ice-clock-scaling-v12-0-09271f583dc6@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Adrian Hunter , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neeraj Soni , Harshal Dev , Kuldeep Singh Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Abhinaba Rakshit , Konrad Dybcio X-Mailer: b4 0.14.2 X-Proofpoint-ORIG-GUID: mHn7IHKp7_Au4artalqqJlR_fotCmBr7 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODIzMDE4MSBTYWx0ZWRfXzsxvqOUluTMp hRl2AqFwqYdAEBzU4GP2IvRLenRu+/uWddZCYuehy6I/WS5iDzyLZT1ar2+LO3JSCnzxQVH16fq Tkzkr5pNS+jgztoyf8olFYQP1y1KOK7up7XwO3RF2QuKWh/Ty1Qb4JiAAVZ3r/AGPKmouyr+l7X d9/17ZsgGYzHfVmNNyYODe65F41KoAYwuPp9FghQqnyI3iSKd+spxa8RCCjVyVW1jGc+d/rwKDo h/6kmDhQuBdkyrs7YcjaFALggYGaMgAXePZ4pXghCkusobN/573Y471wy5aC1PMqtYLDvtmfBkj WyRN7twl31mUwFkYoQTSkCm86z1sUiX6voScrTN1UjbX7NPhOPjyACzfXMiWC3GxbD+Qx47m8Ou q2W/MbNx0gORFoY86V+UCiG0AvCdlax+zIGVuTLcd45g+31xLNFBQfmLvwTItnaP3rpL+35W5x4 OidkBmRNeGH4PNYQnUw== X-Proofpoint-GUID: mHn7IHKp7_Au4artalqqJlR_fotCmBr7 X-Proofpoint-Spam-Info: AW1haW4tMjYwODIzMDE4MSBTYWx0ZWRfX6UiVo7L0tLBi bkHbvGszGfibx8V+f+dO+cN2JabhQDMjp/g8nvImjumfC+NoCUDYrqo75oiYLo7IglkW1sUWlTf XXp04W81RyB0YvxVplXuZDIUJvJX5xs= X-Authority-Analysis: v=2.4 cv=BNuDalQG c=1 sm=1 tr=0 ts=6a8b4e75 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=QyXUC8HyAAAA:8 a=PzEurhthzZq-M9kHIYIA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-23_06,2026-08-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 adultscore=0 malwarescore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608230181 MMC controller lacks a clock scaling mechanism, unlike the UFS controller. By default, the MMC controller is set to TURBO mode during probe, but the ICE clock remains at XO frequency, leading to read/write performance degradation on eMMC. To address this, set the ICE clock to TURBO during sdhci_msm_ice_init to align it with the controller clock. This ensures consistent performance and avoids mismatches between the controller and ICE clock frequencies. For platforms where ICE is represented as a separate device, use the OPP framework to vote for TURBO mode, maintaining proper voltage and power domain constraints. Reviewed-by: Konrad Dybcio Acked-by: Adrian Hunter Reviewed-by: Adrian Hunter Signed-off-by: Abhinaba Rakshit --- drivers/mmc/host/sdhci-msm.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 0882ce74e0c9bdddd98341a67b97bcef74078e0c..1b4c276dce34d76dcbe75117de37e09ea2002633 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -1902,6 +1902,16 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) static const struct blk_crypto_ll_ops sdhci_msm_crypto_ops; /* forward decl */ +static int sdhci_msm_ice_scale_clk(struct sdhci_msm_host *msm_host, + unsigned long target_freq, + bool round_ceil) +{ + if (msm_host->mmc->caps2 & MMC_CAP2_CRYPTO) + return qcom_ice_scale_clk(msm_host->ice, target_freq, round_ceil); + + return 0; +} + static int sdhci_msm_ice_init(struct sdhci_msm_host *msm_host, struct cqhci_host *cq_host) { @@ -1959,6 +1969,11 @@ static int sdhci_msm_ice_init(struct sdhci_msm_host *msm_host, } mmc->caps2 |= MMC_CAP2_CRYPTO; + + err = sdhci_msm_ice_scale_clk(msm_host, ULONG_MAX, false); + if (err && err != -EOPNOTSUPP) + dev_warn(dev, "Unable to boost ICE clock to TURBO\n"); + return 0; } @@ -2149,6 +2164,13 @@ sdhci_msm_ice_suspend(struct sdhci_msm_host *msm_host) { return 0; } + +static inline int +sdhci_msm_ice_scale_clk(struct sdhci_msm_host *msm_host, unsigned long target_freq, + bool round_ceil) +{ + return 0; +} #endif /* !CONFIG_MMC_CRYPTO */ /*****************************************************************************\ -- 2.34.1