From: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
"Martin K. Petersen" <martin.petersen@oracle.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Ulf Hansson <ulfh@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neeraj Soni <neeraj.soni@oss.qualcomm.com>,
Harshal Dev <harshal.dev@oss.qualcomm.com>,
Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-scsi@vger.kernel.org, linux-mmc@vger.kernel.org,
devicetree@vger.kernel.org,
Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Subject: [PATCH v12 6/6] arm64: dts: qcom: lemans: Add OPP-table for ICE UFS device node
Date: Mon, 24 Aug 2026 01:17:43 +0530 [thread overview]
Message-ID: <20260824-enable-ice-clock-scaling-v12-6-09271f583dc6@oss.qualcomm.com> (raw)
In-Reply-To: <20260824-enable-ice-clock-scaling-v12-0-09271f583dc6@oss.qualcomm.com>
Qualcomm Inline Crypto Engine (ICE) platform driver now supports
an optional OPP-table.
Add OPP-table for ICE UFS device nodes for LeMans platform.
Reviewed-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index a10322c5bc35754042640d56ecb556a5ed5cf281..40d13ba5f785bc712b511870b94cfa9c6518c19f 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -3109,6 +3109,32 @@ ice: crypto@1d88000 {
clock-names = "core",
"iface";
power-domains = <&gcc UFS_PHY_GDSC>;
+
+ operating-points-v2 = <&ice_opp_table>;
+
+ ice_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-75000000 {
+ opp-hz = /bits/ 64 <75000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-150000000 {
+ opp-hz = /bits/ 64 <150000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
};
cryptobam: dma-controller@1dc4000 {
--
2.34.1
next prev parent reply other threads:[~2026-08-23 19:48 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-23 19:47 [PATCH v12 0/6] Enable ICE clock scaling Abhinaba Rakshit
2026-08-23 19:47 ` [PATCH v12 1/6] soc: qcom: ice: Add OPP-based clock scaling support for ICE Abhinaba Rakshit
2026-08-24 8:04 ` Abel Vesa
2026-08-27 6:47 ` Kuldeep Singh
2026-08-27 21:11 ` Abhinaba Rakshit
2026-08-23 19:47 ` [PATCH v12 2/6] ufs: host: Add ICE clock scaling during UFS clock changes Abhinaba Rakshit
2026-08-24 8:01 ` Abel Vesa
2026-08-23 19:47 ` [PATCH v12 3/6] mmc: sdhci-msm: Set ICE clk to TURBO at sdhci ICE init Abhinaba Rakshit
2026-08-24 8:00 ` Abel Vesa
2026-08-23 19:47 ` [PATCH v12 4/6] arm64: dts: qcom: kodiak: Add OPP-table for ICE UFS and ICE SDHC nodes Abhinaba Rakshit
2026-08-23 19:47 ` [PATCH v12 5/6] arm64: dts: qcom: monaco: " Abhinaba Rakshit
2026-08-24 8:05 ` Abel Vesa
2026-08-27 6:42 ` Kuldeep Singh
2026-08-23 19:47 ` Abhinaba Rakshit [this message]
2026-08-24 8:04 ` [PATCH v12 6/6] arm64: dts: qcom: lemans: Add OPP-table for ICE UFS device node Abel Vesa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260824-enable-ice-clock-scaling-v12-6-09271f583dc6@oss.qualcomm.com \
--to=abhinaba.rakshit@oss.qualcomm.com \
--cc=James.Bottomley@HansenPartnership.com \
--cc=adrian.hunter@intel.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=harshal.dev@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=kuldeep.singh@oss.qualcomm.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-scsi@vger.kernel.org \
--cc=mani@kernel.org \
--cc=martin.petersen@oracle.com \
--cc=neeraj.soni@oss.qualcomm.com \
--cc=robh@kernel.org \
--cc=ulfh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).